Temporal tile staggering for block based video compression

• US 6,246,719 B1
• Filed: 04/19/1999
• Issued: 06/12/2001
• Est. Priority Date: 05/26/1995
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Agarwal, Rohit
• Primary Examiner(s): Rao, Andy
• Application Number:
  US09/294,780
• Time in Patent Office: 785 Days
• Field of Search: 348/390, 348/389, 348/391, 348/392, 348/405, 348/407, 348/420, 348/421, 375/240.16, 375/240.15, 375/240.14, 375/240.13, 375/240.12
• US Class Current: 375/240.16
• CPC Class Codes: H04N 19/119 Adaptive subdivision aspects, e.g. subdivision of a picture into rectangular or non-rectangular coding blocks
• CPC Class Codes: H04N 19/51 Motion estimation or motion compensation
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 19/85 using pre-processing or post-processing specially adapted for video compression

Abstract

In block based video compression, a frame is divided into blocks which define a tiling pattern. The tiling pattern is varied from frame-to-frame to prevent an accumulation of errors which tend to appear at tile edges and can increase over time when using block-based compression. In a preferred embodiment, a normal frame is padded by a border all around the normal frame size. The padding is operable to extend any blocks around the periphery of the image frame which might be smaller in dimension than the standard blocks, such as those within the interior of the frame, such that they can be treated by the block-based compression systems as full size blocks.

Claims

1. A computer-implemented method for encoding a sequence of images, comprising the steps of:

(a) padding each image to generate a padded frame; and

dividing the padded frame for each image into a plurality of blocks using a tiling pattern wherein the blocks of said each image comprise a plurality of full-sized, interior blocks, wherein the plurality of full-sized, interior blocks are of equal size to one another and comprise all interior blocks of the image; and

(b) changing the tiling pattern for each image from image-to-image in the sequence of images so that the full-sized, interior blocks of said each image have a different size than the full-sized, interior blocks of adjacent images in the sequence of images to reduce tile edge-error build up during encoding; and

(c) encoding the blocks of each image to generate encoded signals for each image.

2. A computer-implemented method for decoding images of a sequence of images comprising the steps of:

(a) receiving motion estimation encoded signals representing images of the sequence of images, wherein the sequence of images has been encoded by an encoder by;

(1) padding each image to generate a padded frame;

(2) dividing the padded frame for each image into a plurality of blocks of said image using a tiling pattern for said image, wherein the blocks of said each image comprises a plurality of full-sized, interior blocks, wherein the plurality of said full-sized, interior blocks are of equal size to one another and comprise all interior blocks of the image;

(3) changing the tiling pattern for each image from image-to-image in the sequence of images so that the full-sized, interior blocks of said each image have a different size than the full-sized, interior blocks of adjacent images in the sequence of images to reduce tile edge-error build up during encoding; and

(4) encoding the blocks of each image to generate encoded signals for each image; and

(b) decoding the received motion estimation encoded signals of each image based on the tiling pattern for said each image to generate a decoded image of the sequence of images deleting signals from the encoded signals of each image to remove padding therefrom.

3. The method of claim 2, wherein step (b) comprises the step of removing padding by deleting pad pixels around a periphery of each image.