Method and apparatus for decoding a phase encoded data signal
First Claim
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1. A method for decoding a phase encoded data signal, the method comprising the steps of:
- a) windowing the data signal to reduce sidelobes in a frequency spectrum of the data signal so as to mitigate interference with other signals;
b) transforming the windowed data signal into real and imaginary frequency components thereof;
c) converting the real and imaginary frequency components of the data signal into phase and magnitude information with respect thereto;
d) summing a plurality of frequencies which substantially comprise noise to provide a magnitude of a noise floor;
e) comparing the magnitude of the data signal to the magnitude of the noise floor so as to provide a signal-to-noise ratio;
f) comparing the signal-to-noise ratio to a threshold value and facilitating further processing of the signal when the signal-to-noise ratio exceeds the threshold value;
g) identifying a maximum magnitude of the data signal;
h) calculating a phase correction and adding the phase correction to the data signal;
i) differentially demodulating the data signal;
j) multiplying the demodulated data signal with a correlation sequence to form a product signal; and
k) hard limiting the product signal and converting the product signal to a binary number.
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Abstract
A method and apparatus for decoding a phase encoded data signal utilizes windowed data which is transformed into real and imaginary frequency components thereof. The real and imaginary frequency components are converted into phase and magnitude information. The magnitude information is used to calculate a threshold based upon a signal-to-noise ratio, and the phase of the data signal is corrected by identifying and sorting magnitude peaks. The data signal is differentially demodulated and the demodulated data is then multiplied by a correlation sequence so as to facilitate its being converted into a binary number.
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Citations
38 Claims
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1. A method for decoding a phase encoded data signal, the method comprising the steps of:
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a) windowing the data signal to reduce sidelobes in a frequency spectrum of the data signal so as to mitigate interference with other signals;
b) transforming the windowed data signal into real and imaginary frequency components thereof;
c) converting the real and imaginary frequency components of the data signal into phase and magnitude information with respect thereto;
d) summing a plurality of frequencies which substantially comprise noise to provide a magnitude of a noise floor;
e) comparing the magnitude of the data signal to the magnitude of the noise floor so as to provide a signal-to-noise ratio;
f) comparing the signal-to-noise ratio to a threshold value and facilitating further processing of the signal when the signal-to-noise ratio exceeds the threshold value;
g) identifying a maximum magnitude of the data signal;
h) calculating a phase correction and adding the phase correction to the data signal;
i) differentially demodulating the data signal;
j) multiplying the demodulated data signal with a correlation sequence to form a product signal; and
k) hard limiting the product signal and converting the product signal to a binary number. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
a) performing a 4 sample Blackman-Harris window;
b) performing a Hamming window; and
c) performing a Blackman window.
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5. The method as recited in claim 1, wherein the step of transforming the windowed data signal comprises performing a Fast Fourier Transform (FFT) upon the windowed data signal.
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6. The method as recited in claim 1, wherein the step of converting the real and imaginary frequency components of the data signal into phase and magnitude information with respect thereto comprises performing a rectangular-to-polar conversion upon only those frequencies which are required for decoding of the data signal.
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7. The method as recited in claim 1, wherein the step of summing a plurality of frequencies which substantially comprise noise comprises summing approximately 500 frequencies above a frequency of the data signal and approximately 500 frequencies below the frequency of the data signal.
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8. The method as recited in claim 1, wherein the step of comparing the signal-to-noise ratio to a threshold value comprise comparing the signal-to-noise ratio to a threshold value of between approximately 6 dB and approximately 50 dB.
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9. The method as recited in claim 1, wherein the step of comparing the signal-to-noise ratio to a threshold value comprises comparing the signal-to-noise ratio to a threshold value of approximately 6 dB.
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10. The method as recited in claim 1, wherein the step of identifying a maximum magnitude of the data signal comprises reading frequency components and calculating a slope of the magnitudes and defining a center frequency of the data signal.
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11. The method as recited in claim 1, wherein the step of identifying a maximum magnitude of the data signal comprises reading frequency components from left to right to calculate a slope of the magnitudes, a center frequency of the data signal being defined as the frequency immediately to the left of the first frequency which results in a calculation of a negative slope.
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12. The method as recited in claim 1, further comprising the step of discarding those peaks which cannot be processed real time by the phase correction circuit, such that phase correction is not performed thereon.
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13. The method as recited in claim 1, wherein the step of adding the phase correction to the data signal comprises modifying a phase of a data signal when a peak of the data signal is not in the center of a transform bin.
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14. The method as recited in claim 1, wherein the step of adding the phase correction to the data signal comprises modifying a phase of a data signal when a peak of the data signal is not in the center of a Fourier Transform bin by determining a peak magnitude of the data signal and a next highest magnitude of the signal and forming a ratio thereof, then multiplying the ratio by 90 degrees and adding an even/odd phase range thereto.
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15. The method as recited in claim 1, wherein the step of adding the phase correction to the data signal comprises modifying a phase of the data signal when a peak of the data signal is not in the center of a Fourier Transform bin by determining a peak magnitude of the data signal and a next highest magnitude of the data signal and forming a ratio thereof, then multiplying the ratio by 90 degrees and adding an even/odd phase range thereto, the even/odd phase range being defined such that an even-numbered Fourier Transform bin is −
- 270 degree at the left edge, 0 degrees in the middle, and +270 degrees on the right edge and such that an odd-numbered Fourier transform bin is +270 degrees at the left edge, −
180/+180 degrees in the middle, and −
270 degrees on the right edge, with the amount of correction being linear between the boundary edges.
- 270 degree at the left edge, 0 degrees in the middle, and +270 degrees on the right edge and such that an odd-numbered Fourier transform bin is +270 degrees at the left edge, −
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16. The method as recited in claim 1, wherein the step of differentially demodulating the data signal comprises subtracting a phase of a current data signal from a phase of a previous data signal and providing a linearly-scaled number between −
- 1 and +1, where −
1 is a phase of −
90 degrees, 0 is a phase of 0 degrees, 180 degrees, or −
180° and
+1 is a phase of +90 degrees.
- 1 and +1, where −
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17. The method as recited in claim 1, wherein the step of multiplying the demodulated data signal with a correlation sequence comprises multiplying the demodulated data signal with a 13-bit Willard sequence of 1111100101000 which is modified by replacing the 0'"'"'s with −
- 1'"'"'s to provide a number between −
13 and +13, where +13 is the maximum correlation value, the circuit also compares the number to a threshold and when the number exceeds the threshold, then a correlation detection is found, the correlation detection defining a start of the message.
- 1'"'"'s to provide a number between −
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18. The method as recited in claim 1, wherein the step of multiplying the demodulated data signal with a correlation sequence comprises multiplying the demodulated data signal with a 13-bit Willard sequence of 1111100101000 which is modified by replacing the 0'"'"'s with −
- 1'"'"'s to provide a number between −
13 and +13, where +13 is the maximum correlation value, and also comparing the number to a threshold equal to +10 and when the number exceeds the threshold, then a correlation detection is found, the correlation detection defining a start of the message.
- 1'"'"'s to provide a number between −
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19. The method as recited in claim 1, wherein the step of multiplying the demodulated data signal with a correlation sequence comprises multiplying the demodulated data signal with a 13-bit Willard sequence of 1111100101000 which is modified by replacing the 0'"'"'s with −
- 1'"'"'s to provide a number between −
13 and +13, where +13 is the maximum correlation value, the circuit also compares the number to a threshold equal to +10, and when the number exceeds the threshold, then a correlation detection is found, the correlation detection defining a start of the message, the message being formatted into a block size of 127 bits, of which 16 bits are synchronization bits and 111 bits are data bits, the 16 synchronization bits comprising 13 Willard bits, a start bit, and 2 spare bits.
- 1'"'"'s to provide a number between −
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20. A phase decoder for decoding a data signal, the phase decoder comprising:
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a) a window circuit for reducing sidelobes in a frequency spectrum of the data signal so as to mitigate interference with other signals;
b) a Fourier Transform circuit for transforming the windowed data signal into real and imaginary frequency components thereof;
c) a rectangular-to-polar conversion circuit for converting the real and imaginary frequency components of the data signal into phase and magnitude information with respect thereto;
d) a noise floor circuit for summing a plurality of frequencies which substantially comprise noise to provide a magnitude of a noise floor;
e) a signal-to-noise ratio circuit for comparing the magnitude of the data signal to the magnitude of the noise floor so as to provide a signal-to-noise ratio;
f) a threshold detector circuit for comparing the signal-to-noise ratio to a threshold value and for facilitating further processing of the signal when the signal-to-noise ratio exceeds the threshold value;
g) a find peak circuit for identifying a maximum magnitude of the data signal;
h) a phase correction circuit for calculating a phase correction and adding the phase correction to the data signal;
i) a differential phase decoder for differentially demodulating the data signal;
j) a correlator for multiplying the demodulated data signal with a correlation sequence; and
k) a binary convertor for hard limiting the output of the differential phase decoder and for converting the output of the differential phase decoder to a binary number. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38)
a) a 4 sample Blackman-Harris window circuit;
b) a Hamming window circuit; and
c) a Blackman window circuit.
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23. The phase decoder as recited in claim 20, wherein the Fourier Transform circuit comprises a Fast Fourier Transform (FFT) circuit.
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24. The phase decoder as recited in claim 20, wherein the Fourier Transform circuit comprises a circuit for transforming the windowed data signal into 16,384 real frequency components and 16,384 imaginary frequency components.
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25. The phase decoder as recited in claim 20, wherein the rectangular-to-polar conversion circuit comprises a circuit for converting only those frequencies which are required for decoding of the data signal.
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26. The phase decoder as recited in claim 20, wherein the noise floor circuit comprises a circuit for summing approximately 500 frequencies above a frequency of the data signal and approximately 500 frequencies below the frequency of the data signal.
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27. The phase decoder as recited in claim 20, wherein the threshold detector circuit comprises a circuit having a threshold value of between approximately 6 dB and approximately 50 dB.
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28. The phase decoder as recited in claim 20, wherein the threshold detector circuit comprises a circuit having a threshold value of approximately 6 dB.
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29. The phase decoder as recited in claim 20, wherein the find peak circuit comprises a circuit for reading frequency components from the Fourier Transform circuit and calculating a slope of the magnitudes and defining a center frequency of the data signal.
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30. The phase decoder as recited in claim 20, wherein the find peak circuit comprises a circuit for reading frequency components from left to right to calculate a slope of the magnitudes, a center frequency of the data signal being defined as the frequency immediately to the left of the first frequency which results in a calculation of a negative slope.
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31. The phase decoder as recited in claim 20, further comprising a sort peak circuit for receiving peaks from the find peak circuit and for sending only those peaks which can be processed real time by the phase correction circuit thereto.
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32. The phase decoder as recited in claim 20, wherein the phase correction circuit comprises a circuit for modifying a phase of a data signal when a peak of the data signal is not in the center of a Fourier Transform bin.
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33. The phase decoder as recited in claim 20, wherein the phase correction circuit comprises a circuit for modifying a phase of a data signal when a peak of the data signal is not in the center of a Fourier Transform bin by determining a peak magnitude of the data signal and a next highest magnitude of the signal and forming a ratio thereof, then multiplying the ratio by 90 degrees and adding an even/odd phase range thereto.
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34. The phase decoder as recited in claim 20, wherein the phase correction circuit comprises a circuit for modifying a phase of a data signal when a peak of the data signal is not in the center of a Fourier Transform bin by determining a peak magnitude of the data signal and a next highest magnitude of the signal and forming a ratio thereof, then multiplying the ratio by 90 degrees and adding an even/odd phase range thereto, the even/odd phase range being defined such that an even numbered Fourier Transform bin is −
- 270 degrees at the left edge, 0 degrees in the middle, and +270 degrees on the right edge and such that an odd numbered Fourier Transform bin is +270 degrees at the left edge, −
180/+180 degrees in the middle, and −
270 degrees on the right edge, with the amount of correction being linear between the boundary edges.
- 270 degrees at the left edge, 0 degrees in the middle, and +270 degrees on the right edge and such that an odd numbered Fourier Transform bin is +270 degrees at the left edge, −
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35. The phase decoder as recited in claim 20, wherein the differential phase decoder comprises a circuit for subtracting a phase of a current data signal from a phase of a previous data signal and providing a linearly scaled number between −
- 1 and +1, where −
1 is a phase of −
90 degrees, 0 is a phase of 0 degrees, 180 degrees, or −
180 degrees, and +1 is a phase of +90 degrees.
- 1 and +1, where −
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36. The phase decoder as recited in claim 20, wherein the correlator comprises a circuit for multiplying the demodulated data signal with a 13-bit Willard sequence of 1111100101000 which is modified by replacing the 0'"'"'s with −
- 1'"'"'s to provide a number between −
13 and +13, where +13 is the maximum correlation value, the circuit also compares the number to a threshold and when the number exceeds the threshold, then a correlation detection is found, the correlation detection defining a start of the message.
- 1'"'"'s to provide a number between −
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37. The phase decoder as recited in claim 20, wherein the correlator comprises a circuit for multiplying the demodulated data signal with a 13-bit Willard sequence of 1111100101000 which is modified by replacing the 0'"'"'s with −
- 1'"'"'s to provide a number between −
13 and +13, where +13 is the maximum correlation value, the circuit also compares the number to a threshold equal to +10, and when the number exceeds the threshold, then a correlation detection is found, the correlation detection defining a start of the message.
- 1'"'"'s to provide a number between −
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38. The phase decoder as recited in claim 20, wherein the correlator comprises a circuit for multiplying the demodulated data signal with a 13 -bit Willard sequence of 1111100101000 which is modified by replacing the 0'"'"'s with −
- 1'"'"'s to provide a number between −
13 and +13, where +13 is the maximum correlation value, the circuit also compares the number to a threshold equal to +10, and when the number exceeds the threshold, then a correlation detection is found, the correlation detection defining a start of the message, the message being formatted into a block size of 127 bits, of which 16 bits are synchronization bits and 111 bits are data bits, the 16 synchronization bits comprising 13 Willard bits, a start bit, and 2 spare bits.
- 1'"'"'s to provide a number between −
Specification