×

Method and apparatus for verifying that data stored in a memory has not been corrupted

  • US 6,247,151 B1
  • Filed: 06/30/1998
  • Issued: 06/12/2001
  • Est. Priority Date: 06/30/1998
  • Status: Expired due to Term
First Claim
Patent Images

1. An integrated circuit device comprising:

  • dedicated memory verification logic to compare data read from a set of cells in a memory at a first time to data read from the same set of memory cells at a second time;

    read control logic to read the data from the first set of cells, wherein the memory verification logic includes signature generation logic to perform an algorithm on the data read from the first set of cells to generate a result, and compare logic coupled to the signature generation logic, the compare logic to compare a first result generated at the first time to a second result generated at the second time, the compare logic to produce a verify signal if the first and second results match.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×