Analog pixel drive circuit for an electro-optical material-based display device

• US 6,249,269 B1
• Filed: 04/30/1998
• Issued: 06/19/2001
• Est. Priority Date: 04/30/1998
• Status: Expired due to Fees

• Current Assignee: Avago Technologies ECBU IP Singapore Pte Limited (Broadcom, Inc.)
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Blalock, Travis N., Walker, Richard C., Gaddis, Neela B.
• Primary Examiner(s): Shalwala, Bipin
• Assistant Examiner(s): LEWIS, DAVID LEE
• Application Number:
  US09/070,669
• Time in Patent Office: 1,146 Days
• Field of Search: 345/98, 345/97, 345/100, 345/204, 345/8, 345/94, 345/89, 345/92, 345/99, 345/212, 345/214
• US Class Current: 345/97
• CPC Class Codes: G02F 1/133622 Colour sequential illumination
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0823 used to establish symmetry in driving, e.g. with polarity inversion
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 2310/0259 with use of an analog or digital ramp generator in the column driver or in the pixel circuit
• CPC Class Codes: G09G 2310/066 Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
• CPC Class Codes: G09G 2320/0276 for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3651 using multistable liquid crystals, e.g. ferroelectric liquid crystals
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

The analog drive circuit drives a pixel electrode in response to an analog sample derived from a video signal. The analog drive circuit comprises a sample selection section and a drive signal generator. The sample selection section receives and temporarily stores the analog sample during a sample load period. The drive signal generator generates a drive signal and applies the drive signal to the pixel electrode during a display period that follows the sample load period. The drive signal is composed of a sequence of a first temporal portion and a second temporal portion. The first temporal portion has a time duration substantially proportional to the analog sample temporarily stored in the sample selection section. The second temporal portion is the temporal complement of the first temporal portion.

Claims

1. An analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal, the analog drive circuit comprising:

a sample selection section that receives and temporarily stores the analog sample during a sample load period; and

a drive signal generator that, during a display period that follows the sample load period, generates a drive signal and applies the drive signal to the pixel electrode, the drive signal being composed of a sequence of a first temporal portion and a second temporal portion, the first temporal portion having a time duration dependent on the analog sample temporarily stored in the sample selection section, the second temporal portion being a temporal complement of the first temporal portion, the drive signal generator including a comparator having a first input, a second input and an output, the output being connected to the pixel electrode, the comparator generating the drive signal and having a detection sense set by a sense control signal having opposite states in consecutive frames of the video signal; and

the analog drive circuit additionally includes;

a first switching arrangement that alternately connects a ramp signal to (a) the first input and (b) the second input of the comparator in consecutive display periods the ramp signal having a duration equal to the display period, and

a second switching arrangement that alternately connects the sample selection section to (a) the second input and (b) the first input of the comparator in consecutive display periods.

2. The analog drive circuit of claim 1, in which the sample storage section includes:

a sample storage element;

a sample selection gate that opens during the sample load period to admit the analog sample to the sample storage element and that is closed during the display period; and

a sample output gate that opens one of (a) during and (b) prior to the display period, the sample output gate being disposed between the sample storage element and the drive signal generator.

3. The analog drive circuit of claim 1, in which the drive signal generator includes a comparator that generates the drive signal, the comparator comprising:

a first input to which the sample selection section is connected, and

a second input to which a ramp signal is connected, the ramp signal having a duration equal to the display period.

4. The analog drive circuit of claim 1, in which the drive signal generator operates in response to a ramp signal that has a non-linear slope to provide gamma correction.

5. The analog drive circuit of claim 1, in which:

the drive signal generator includes a comparator that generates the drive signal, the comparator including a first input and a second input and having a detection sense set by a sense control signal, the sense control signal having opposite states in consecutive frames of the video signal; and

the analog drive circuit additionally includes;

a first switching arrangement that alternately connects a ramp signal to (a) the first input and (b) the second input of the comparator in consecutive display periods, the ramp signal having a duration equal to the display period, and

a second switching arrangement that alternately connects the sample selection section to (a) the second input and (b) the first input of the comparator in consecutive display periods.

26. The analog drive circuit of claim 1, in which the video signal is a color-sequential video signal.

6. An analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal, the analog drive circuit comprising:

a sample selection section that receives and temporarily stores the analog sample during a sample load period; and

a drive signal generator that, during a display period that follows the sample load period, generates a drive signal and applies the drive signal to the pixel electrode, the drive signal being composed of a sequence of a first temporal portion and a second temporal portion, the first temporal portion having a time duration dependent on the analog sample temporarily stored in the sample selection section, the second temporal portion being a temporal complement of the first temporal portion, the drive signal generator including;

an inverter that generates the drive signal, the inverter having an input and an output;

a capacitor having a first electrode and a second electrode, the first electrode being connected to the input of the inverter and to the sample selection section, the second electrode being connected to a ramp signal having a duration equal to the display period; and

a switch that discharges the capacitor prior to the display period.

7. The analog drive circuit of claim 6, in which:

the drive signal generator additionally includes;

a coupling capacitor coupling the input of the inverter to the sample selection section, and

an additional switch that temporarily connects the output of the inverter to the input of the inverter prior to the display period; and

the switch is coupled to a reference signal that has a state equal to a predetermined inverter threshold voltage when the additional switch connects the output of the inverter to the input.

8. An analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal, the analog drive circuit comprising:

a sample selection section that receives and temporarily stores the analog sample during a sample load period; and

a drive signal generator that, during a display period that follows the sample load period, generates a drive signal and applies the drive signal to the pixel electrode, the drive signal being composed of a first sequence of a first temporal portion and a second temporal portion, the first temporal portion having a time duration dependent on the analog sample temporarily stored in the sample selection section, the second temporal portion being a temporal complement of the first temporal portion, the first sequence having a duration equal to one half of the display period, the drive signal generator generating the drive signal in a first electrical state during the first temporal portion and in a second electrical state during the second temporal portion, and generating the drive signal additionally composed of a second sequence of the first temporal portion, in which the drive signal is in the second electrical state, and the second temporal portion, in which the drive signal is in the first electrical state, the first temporal portion and the second temporal portion being in any order in the second sequence.

9. The analog drive circuit of claim 8, in which the drive signal generator includes a comparator having an output connected to the pixel electrode, that generates the drive signal and that has a detection sense set by a sense control signal that changes state half-way through the display period, the comparator comprising:

a first input to which the sample selection section is connected; and

a second input to which a ramp signal having a duration equal to one-half of the display period is connected.

10. The analog drive circuit of claim 8, in which:

the drive signal generator includes a comparator that generates the drive signal, the comparator comprising a first input and a second input and having a detection sense set by a sense control signal that changes state half-way through the display period; and

the analog drive circuit additionally includes;

a switching arrangement that alternately connects the ramp signal to (a) the first input and (b) the second input of the comparator during consecutive display periods, and

a switching arrangement that alternately connects the sample selection section to (a) the second input and (b) the first input of the comparator during consecutive display periods.

11. The analog drive circuit of claim 8, in which the drive signal generator includes:

a first inverter, the first inverter having an input and an output;

a second inverter having an input connected to the output of the first inverter, the second inverter having an output;

a capacitor having a first electrode and a second electrode, the first electrode being connected to the input of the first inverter and to the sample selection section, the second electrode being connected to a ramp signal having a duration equal to one-half of the display period;

a switch that discharges the capacitor prior to the display period; and

a switching arrangement connected to the outputs of the first inverter and the second inverter and operating in response to a sense control signal that changes state half-way through the display period to take the output of one of (a) the first inverter and (b) the second inverter as the drive signal.

12. The analog drive circuit of claim 11, in which:

the drive signal generator additionally includes;

a coupling capacitor coupling the input of the inverter to the sample selection section, and

an additional switch that temporarily connects the output of the first inverter to the input of the first inverter prior to the display period; and

the switch is coupled to a reference signal that has a state equal to a predetermined inverter threshold-voltage when the additional switch connects the output of the first inverter to the input of the first inverter.

13. An analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal composed of alternating odd and even frames each having a frame period, the analog drive circuit comprising:

an odd sample selection that receives and temporarily stores the analog sample only when the analog sample is taken from one of the odd frames;

an even sample selection section that receives and temporarily stores the analog sample when the analog sample is taken from one of the even frames; and

a drive signal generator that, during a display period that follows the sample load period, generates a drive signal and applies the drive signal to the pixel electrode, the drive signal being composed of a sequence of a first temporal portion and a second temporal portion, the first temporal portion having a time duration substantially proportional to the analog sample temporarily stored in the sample selection section, the second temporal portion being a temporal complement of the first temporal portion, the drive signal generator operating, during a display period coincident with each sample load period in which the analog sample is taken from one of the even frames, to generate the drive signal in response to the analog sample stored in the odd sample selection section, and, during a display period coincident with each sample load period in which the analog sample is taken from one of the odd frames, to generate the drive signal in response to the analog sample temporarily stored in the even sample selection section.

14. The analog drive circuit of claim 13, in which each of the sample selection sections includes:

a sample storage element;

a sample selection gate that opens during the sample load period to admit the analog sample to the sample storage element, the sample selection gate of the odd sample selection section opening in antiphase to the sample selection gate of the even sample selection section; and

a sample output gate that opens only during the display period, the sample output gate being disposed between the sample storage element and the drive signal generator, the sample output gate of the odd sample section opening in antiphase to the sample output gate of the even sample selection section.

15. The analog drive circuit of claim 13, in which:

the drive signal generator includes a comparator that generates the drive signal, the comparator comprising a first input to which a ramp signal having a duration equal to the frame period is connected, and a second input; and

the analog drive circuit additionally comprises a switching element that alternately connects the odd sample selection section and the even sample selection section to the second input of the comparator in consecutive frame periods.

16. The analog drive circuit of claim 13, in which:

the drive signal generator includes a comparator that generates the drive signal, the comparator comprising a first input and a second input and having a detection sense set by a sense control signal having opposite states in consecutive frame periods; and

the analog drive circuit additionally includes;

a first switching element that alternately connects a ramp signal to (a) the first input and (b) the second input of the comparator in consecutive frame periods, the ramp signal having a duration equal to the frame period, and

a second switching element that alternately connects (a) the odd sample selection section to the second input of the comparator and (b) the even sample selection section to the first input of the comparator in consecutive frame periods.

17. The analog drive circuit of claim 13, in which the drive signal generator includes:

an inverter that generates the drive signal, the inverter having an input;

a capacitor having a first electrode and a second electrode, the first electrode being connected to the input of the inverter and to the sample selection section, the second electrode being connected to a ramp signal having a duration equal to the frame period; and

a switch that discharges the capacitor prior to the frame period.

18. The analog drive circuit of claim 17, in which:

the analog drive circuit additionally includes;

a coupling capacitor providing the connection between the sample selection section and the input of the inverter, and

a second switch that connect the output of the inverter to the input of the inverter prior to the display period; and

the switch is coupled to a reference signal that has a state equal to a predetermined inverter threshold voltage when the additional switch connects the output of the inverter to the input of the inverter.

19. The analog drive circuit of claim 13, in which:

the sequence of the first temporal portion and the second temporal portion is a first sequence of the first temporal portion and the second temporal portion and has a duration equal to one-half of the frame period; and

the drive signal generator generates the drive signal in a first electrical state during the first temporal portion and in a second electrical state during the second temporal portion, and generates the drive signal additionally composed of a second sequence of the first temporal portion in which the drive signal is in the second electrical state and the second temporal portion in which the drive signal in the first electrical state, the first temporal portion and the second temporal portion being in any order in the second sequence.

20. The analog drive circuit of claim 19, in which:

the drive signal generator includes a comparator that generates the drive signal and has a detection sense set by a sense control signal that changes state half-way through the display period, the comparator comprising a first input to which is connected a ramp signal having a duration equal to one-half of the frame periods, and a second input; and

the analog drive circuit additionally comprises a switching element that alternately connects (a) the odd sample selection section and (b) the even sample selection section to the second input of the comparator in consecutive frame periods.

21. The analog drive circuit of claim 19, in which:

the drive signal generator includes a comparator that generates the drive signal, the comparator comprising a first input and a second input and having a detection sense set by a sense control signal having opposite states in consecutive frame periods; and

the analog drive circuit additionally comprises;

a first switching element that alternately connects a ramp signal to (a) the first input and (b) the second input of the comparator in consecutive frame periods, the ramp signal having a duration of one-half of the frame period, and

a second switching element that alternately connects (a) the odd sample selection section to the second input of the comparator and (b) the even sample selection section to the first input of the comparator in consecutive frame periods.

22. The analog drive circuit of claim 19, in which the drive signal generator includes:

a first inverter, the first inverter having an input and an output;

a second inverter having an input connected to the output of the first inverter, the second inverter having an output;

a capacitor having a first electrode and a second electrode, the first electrode being connected to the input of the first inverter and to the sample selection section, the second electrode being connected to a ramp signal having a duration equal to one-half of the frame period;

a switch that discharges the capacitor prior to the frame period; and

a switching arrangement connected to the outputs of the first inverter and the second inverter and operating in response to a sense control signal that changes state half-way through the frame period to take the output of one of (a) the first inverter and (b) the second inverter as the drive signal.

23. The analog drive circuit of claim 22, in which:

the analog drive circuit additionally includes;

a coupling capacitor connecting the sample selection section to the input of the first inverter, and

a second switch that connect the output of the first inverter to the input of the first inverter prior to the frame period; and

the switch is coupled to a reference signal that has a state equal to a predetermined first inverter threshold voltage when the additional switch connects the output of the first inverter to the input of the first inverter.

24. An analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal that includes a color component for each of more than one color;

a sample selection section including;

a sample storage element corresponding to each color component,

a sample selection gate that opens during a sample load period to admit the analog sample of each color component to each respective sample storage element, and

a sample output gate disposed between each sample storage element and the drive signal generator, the sample output gates operating sequentially to connect the analog sample stored in each sample storage element to the drive signal generator; and

a drive signal generator that operates during a display period that follows the sample load period to generate sequentially a drive signal in response to the analog sample stored in each sample storage element, and to apply each drive signal to the pixel electrode, each drive signal being composed of a sequence of a first temporal portion and a second temporal portion, the first temporal portion having a time duration substantially proportional to the analog sample temporarily stored in the corresponding sample selection section, the second temporal portion being a temporal complement of the first temporal portion.

25. The analog drive circuit of claim 24, in which:

the drive signal generator includes a comparator that generates the drive signal, the comparator comprising a first input and a second input and having a detection sense set by a sense control signal having opposite states in consecutive frame periods; and

the analog drive circuit additionally comprises;

a first switching element that alternately connects a ramp signal to (a) the first input and (b) the second input of the comparator in consecutive frame periods, the ramp signal having a duration of one-half of the frame period, and

a second switching element that alternately connects (a) the odd sample selection section to the second input of the comparator and (b) the even sample selection section to the first input of the comparator in consecutive frame periods.

27. An analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal, the analog drive circuit comprising:

a sample selection section that receives and temporarily stores the analog sample during a sample load period; and

a drive signal generator that, during a display period that follows the sample load period, generates a drive signal and applies the drive signal to the pixel electrode, the drive signal being composed of a sequence of a first temporal portion and a second temporal portion, the first temporal portion and the second temporal portion each having a beginning, the first temporal portion having a time duration substantially proportional to the analog sample temporarily stored in the sample selection section, the second temporal portion being a temporal complement of the first temporal portion,

the drive signal being composed of pulse having a first polarity at the beginning of the first temporal portion and a pulse having a second polarity, opposite the first polarity, at the beginning of the second portion.

28. The analog drive circuit of claim 27, in which the drive signal generator includes an a.c.—

coupled output.