Planar reflective light valve backplane

• US 6,252,999 B1
• Filed: 12/23/1998
• Issued: 06/26/2001
• Est. Priority Date: 12/23/1998
• Status: Expired due to Term

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Aurora Systems Inc (Allegion PLC)
• Inventors: Hsu, Rong, Haskell, Jacob Daniel
• Primary Examiner(s): Healy, Brian
• Application Number:
  US09/219,617
• Time in Patent Office: 916 Days
• Field of Search: 385/1, 385/3, 385/14, 385/15, 385/18, 385/129, 385/130, 385/131
• US Class Current: 385/14
• CPC Class Codes: G02F 1/133357 Planarisation layers
• CPC Class Codes: G02F 1/133553 Reflecting elements associated to illuminating devices G02F1/133605
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon

Abstract

A planar wafer based device (e.g., a reflective light valve backplane) includes a substrate having a plurality of surface projections (e.g., pixel mirrors) defining gaps therebetween, an etch-resistant layer formed on the substrate, and a fill layer formed on a portion of the etch-resistant layer in the gaps. In a particular embodiment, the fill layer is a spin-on coating. An optional protective layer formed on the exposed portions of the etch-resistant layer and the fill layer protects the underlying layers during subsequent processing steps.

Claims

1. An integrated electronic device comprising:

a substrate including a plurality of surface projections defining gaps therebetween;

an etch-resistant layer formed on said substrate; and

a fill layer formed on a portion of said etch-resistant layer in said gaps.

2. An integrated electronic device according to claim 1, wherein:

said substrate comprises an integrated circuit; and

said projections comprise optical elements.

3. An integrated electronic device according to claim 2, wherein:

said substrate comprises a reflective display backplane; and

said projections comprise pixel mirrors.

4. An integrated electronic device according to claim 3, wherein said etch-resistant layer includes an optical thin film layer.

5. An integrated electronic device according to claim 4, wherein said etch-resistant layer further includes an etch-resistant cap layer over said optical thin film layer.

6. An integrated electronic device according to claim 5, wherein said etch-resistant cap layer is optically inactive.

7. An integrated electronic device according to claim 5, wherein said etch-resistant cap layer comprises a nitride layer.

8. An integrated electronic device according to claim 5, wherein said etch-resistant cap layer has a thickness in the range of 640 Å

(±

10%).

9. An integrated electronic device according to claim 4, wherein said optical thin film layer comprises an oxide layer.

10. An integrated electronic device according to claim 9, wherein said oxide layer has a thickness in the range of 750 Å

(±

10%).

11. An integrated electronic device according to claim 9, wherein said etch-resistant layer further comprises an etch-resistant cap layer.

12. An integrated electronic device according to claim 11, wherein said etch-resistant cap layer comprises a nitride layer.

13. An integrated electronic device according to claim 12, wherein:

said oxide layer has a thickness in the range of 750 Å

(±

10%), and

said nitride layer has a thickness in the range of 640 Å

(±

10%).

14. An integrated electronic device according to claim 4, wherein said optical thin film layer has a thickness in the range of 750 Å

(±

10%).

15. An integrated electronic device according to claim 3, further comprising a protective layer disposed over said etch-resistant layer and said fill layer.

16. An integrated electronic device according to claim 15, wherein said protective layer comprises an oxide layer.

17. An integrated electronic device according to claim 16, wherein said protective layer further comprises a nitride layer disposed over said oxide layer.

18. An integrated electronic device according to claim 17, wherein said nitride layer has a thickness in the range of 1,200 Å

(±

10%).

19. An integrated electronic device according to claim 16, wherein said oxide layer has a thickness in the range of 840 Å

(±

10%).

20. An integrated electronic device according to claim 16, wherein said protective layer further comprises a nitride layer disposed over said oxide layer.

21. An integrated electronic device according to claim 20, wherein:

said oxide layer has a thickness in the range of 840 Å

(±

10%); and

said nitride layer has a thickness in the range of 1,200 Å

(±

10%).

22. An integrated electronic device according to claim 3, wherein said fill layer comprises a spin-on-coating.

23. An integrated electronic device according to claim 22, wherein said fill layer comprises spin-on-glass.

24. An integrated electronic device according to claim 22, wherein said fill layer comprises a light absorbing dopant.

25. An integrated electronic device according to claim 24, wherein said dopant comprises dye.

26. An integrated electronic device according to claim 3, wherein the elevational difference between a top surface of said etch-resistant layer overlying said pixel mirrors and a top surface of said fill layer remaining in said gaps, is less than or equal to 1,200Å

.

27. A reflective display backplane comprising:

a plurality of pixel mirrors defining gaps therebetween; and

a fill layer formed in said gaps to planarize the surface of said reflective display backplane.

28. A reflective display backplane according to claim 27, wherein a portion of said fill layer overlies said pixel mirrors.

29. A reflective display backplane according to claim 28, wherein said fill layer comprises a spin-on coating.

30. A reflective display backplane according to claim 29, wherein said fill layer comprises spin-on glass.

31. A reflective display backplane according to claim 27, wherein said fill layer comprises a spin-on coating.

32. A reflective display backplane according to claim 31, wherein said fill layer comprises spin-on glass.

33. A reflective display backplane according to claim 27, further comprising a base layer disposed under said fill layer.

34. A reflective display backplane according to claim 33, wherein said base layer comprises:

a first oxide layer disposed over said pixel mirrors;

a first nitride layer disposed over said first oxide layer;

a second oxide layer disposed over said first nitride layer; and

a second nitride layer disposed over said second oxide layer.