Electronic circuit for an active implantable medical device and method of manufacture

• US 6,256,206 B1
• Filed: 12/11/1998
• Issued: 07/03/2001
• Est. Priority Date: 12/12/1997
• Status: Expired due to Term

• Current Assignee: Sorin CRM SAS (MicroPort Scientific Corp.)
• Original Assignee: Ela Medical S.A. (LivaNova Plc)
• Inventors: Van Campenhout, Yves
• Primary Examiner(s): Gandhi, Jayprakash N.
• Application Number:
  US09/210,074
• Time in Patent Office: 935 Days
• Field of Search: 361/748, 361/760, 361/761, 361/764, 361/767, 361/772, 361/782, 361/783, 361/803, 361/807-812, 257/678, 257/676, 257/687, 257/690, 257/723, 174/260, 174/138.R, 174/138.G, 295/921, 298/30, 298/40
• US Class Current: 361/760
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 23/5383 Multilayer substrates H01L23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L23/538
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits

Abstract

An electronic circuit, particularly for an active implantable medical device such as a cardiac pacemaker or a defibrillator, and a process of realization (manufacture/assembly). This electronic circuit includes at least one chip (12), as well as other associated electronic components (18), placed on a substrate (10). The chip is a bare, exposed chip, that is not one embedded in a case or encapsulated, having on its face electrical contact pads turned to the exterior, such that the chip is buried in the thickness of the substrate, preferably near or at the bottom of a cavity (30). The cavity is filled with an isolating resin (38), up to the surface of the substrate and covering the chip, except for connection threads (34,36) connected to interconnection conductors (24, 26, 28) of the substrate. It is thus possible to place at least some supplementary components superimposed above the chip and, further, to foresee above the chip a plurality of supplementary layers of interconnections. The result is a more compact, space efficient electrical circuit.

Claims

1. An electronic circuit for an active implantable medical device, such as a cardiac pacemaker or defibrillator, comprising:

at least one chip (12) and at least one other associated electronic component (18) placed on a substrate (10), wherein said at least one chip is a bare chip, not embedded in an encapsulation, having an electrical contact pad on at least one surface, and wherein the chip surface having said contact pad is turned toward the exterior, and wherein the substrate comprises a thickness and a cavity (30) having a bottom, wherein the chip is located proximate to the bottom of the substrate cavity;

an electrical connection having one end connected to the chip contact pad and the other end extending to a surface of the substrate; and

an isolating resin (38) filling the cavity to the surface of the substrate such that the isolating resin covers the chip and not the end of the electrical connection, wherein the electrical connection is to be connected to electrical interconnections (24, 26, 28) of the substrate.

2. The circuit of claim 1, in which at least one of the associated electronic components is placed in superposition above the at least one chip.

3. The circuit of claim 2 wherein the electrical connection further comprises an electrical connection thread.

4. The circuit of claim 1, further comprising a plurality of supplementary interconnection layers (42, 44, 46) placed above the chip.

5. The circuit of claim 1 wherein said at least one chip further comprises a first chip having a first area and a second chip having a second area, said first chip being at said cavity bottom, each of said first and second chips having at least one contact pad turned toward said surface and said contact pads of the first and second chips having electrical connections extending to said surface.

6. The circuit of claim 5 wherein the cavity further comprises a depth sufficient to receive the first and second chips in said cavity and below the surface.

7. The circuit of claim 5 wherein at least one of the first and second chips comprises more than one chip, said more than one chip being superposed at least partially relative to said other of the first and second chips.

8. The circuit of claim 5 wherein the first and second chips are attached to each other.

9. The circuit of claim 2 wherein said at least one chip further comprises a first chip having a first area and a second chip having a second area, said first chip being proximate to said cavity bottom, wherein said first chip further comprises a contact pad turned toward said cavity bottom, said substrate further comprising a conductive substrate at said cavity bottom, wherein said first chip contact pad is in electrical connection with said conductive layer, and said second chip has a contact pad turned toward said surface, wherein the electrical connection connects said second chip connection pad to said surface.

10. The circuit of claim 9 wherein the first and second chips are attached to each other.

11. The circuit of claim 9 wherein the cavity further comprises a depth sufficient to receive the first and second chips in said cavity and below the surface.

12. The circuit of claim 9 wherein at least one of the first and second chips comprises more than one chip, said more than one chip being superposed at least partially relative to said other of the first and second chips.

13. An electronic circuit for an active implantable medical device, such as a cardiac pacemaker or defibrillator, comprising:

at least one chip (12) and at least one other associated electronic component (18) placed on a substrate (10), wherein said at least one chip is a bare chip, not embedded in an encapsulation, having an electrical contact pad on at least one surface, and wherein the chip surface having said contact pad is turned toward the interior, and wherein the substrate comprises a thickness and a cavity (30) having a bottom and a conductive layer opposed to said cavity bottom, wherein the chip is located proximate to the bottom of the substrate cavity, an electrical connection having one end connected to the chip contact pad and the other end extending to the cavity bottom conductive layer; and

an isolating resin (38) filing the cavity to the surface of the substrate such that the isolating resin covers the chip.

14. The circuit of claim 13, in which at least one of the associated electronic components is placed in superposition above the at least one chip.

15. The circuit of claim 13, further comprising a plurality of supplementary interconnection layers (42,44,46) placed above the chip.

16. The circuit of claim 13, wherein said at least one chip further comprises a first chip having a first area and a second chip having a second area, said first chip being at said cavity bottom, the second chip having at least one contact pad turned toward said surface and said contact pad of the second chip having an electrical connection extending to said surface.

17. The circuit of claim 16, wherein the first and second chips are attached to each other.

18. The circuit of claim 16, wherein the cavity further comprises a depth sufficient to receive the first and second chips in said cavity and below the surface.

19. The circuit of claim 16, wherein the electrical connection to said second chip further comprises an electrical connection thread.

20. The circuit of claim 16, wherein at least one of the first and second chips comprise more than one chip, said more than one chip being superposed at least partially relative to said other of the first and second chips.