Current-induced magnetic switching device and memory including the same

• US 6,256,223 B1
• Filed: 06/20/2000
• Issued: 07/03/2001
• Est. Priority Date: 07/28/1998
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Sun, Jonathan Zanhong
• Primary Examiner(s): Fears, Terrell W.
• Application Number:
  US09/597,223
• Time in Patent Office: 378 Days
• Field of Search: 361/143, 365/171
• US Class Current: 365/171
• CPC Class Codes: B82Y 25/00 Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect
• CPC Class Codes: H01F 10/3213 Exchange coupling of magnetic semiconductor multilayers, e.g. MnSe/ZnSe superlattices semiconductor materials for use in semiconductor devices H01L29/12
• CPC Class Codes: H01F 10/3227 Exchange coupling via one or more magnetisable ultrathin or granular films
• CPC Class Codes: H01F 10/3254 the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]
• CPC Class Codes: H10N 50/10 Magnetoresistive devices

Abstract

A magnetic switching device, includes a first electrode, a second electrode, and a nanoparticle having a magnetic moment and being disposed between the first and second electrodes. At least one of the first electrode and the second electrode includes a magnetic material which has a net spin polarization in its conduction band for injecting, into the nanoparticle, an electrical current including a net spin polarization for overcoming the magnetic moment of the nanoparticle upon selection of a predetermined magnitude for the electrical current.

Claims

1. A memory array, comprising:

a plurality of first metal lines;

a plurality of second metal lines approximately perpendicular to said plurality of first metal lines;

a plurality of two-terminal devices respectively provided at intersections of said first and second metal lines, each of said two-terminal devices including;

a pair of back-to-back diodes placed in series with a magnectic junction to allow selective read-addressing; and

a supply cell with a bias current exceeding a positive or negative current threshold (+I_c or −

I_c) of said switch, said supply cell forming a same addressing circuit for selective write and read operations,

wherein, with a predetermined I_c and V_c the I_c of only one junction situated at an intersection of the first and second metal line is selectively exceeded while king all other junctions unchanged.

2. A magnetic memory, comprising:

a current-driven magnetic switching device forming a basic storage element for said memory; and

an x-y grid, said switching device being formed at an intersection of said x-y grid,

wherein said x-y grid is used for both reading and writing to said basic storage element such that said switching device is momentarily biased by a current level above its switching threshold, causing said switching device to change its magnetic state, thereby writing to said memory.

6. The memory of claim 2, wherein said x-y grid comprises a bitline-wordline grid.

7. The memory of claim 2, wherein said switching device comprises a two-terminal device.

8. The memory according to claim 7, wherein said two-terminal device comprises:

a pair of back-to-back diodes placed in series with a magnetic junction, to allow selective read-addressing.

9. The memory according to claim 8, wherein said two-terminal device further comprises:

a supply cell with a bias current exceeding a positive or negative current threshold of said switching device, said supply cell forming a same addressing circuit for selective write and read operations.

3. A magnetic nanocluster junction, comprising:

a ferromagnetic electrode;

a ferromagnetic nanoparticle having a first side adjacent said ferromagnetic electrode; and

a counter electrode adjacent said ferromagnetic nanoparticle on a second side thereof.

4. The magnetic nanocluster junction according to claim 3, wherein said ferromagnetic electrode, said ferromagnetic nanoparticle and said counter electrode form a magnetic junction structure of one of

La_0.67MnO₃/SrTiO₃/La_0.67Sr_0.33MnO₃ and

La_0.67MnO₃/SrTiO₃/La_0.67Ca_0.33MnO₃.

5. A magnetic random-access memory architecture, comprising:

a phlrality of magnetic nanocluster junctions, each of said magnetic nanocluster junctions comprising;

a ferromagnetic electrode;

a ferromagnetic nanoparticle having a first side adjacent said ferromagnetic electrode; and

a counter electrode adjacent said ferromagnetic nanoparticle on a second side thereof, said nanocluster junction forming a current-driven switch for a memory cell; and

an addressing circuit for addressing a selected memory cell,

wherein a read operation and a write operation are achieved using the addressing circuit.