Bus/port switching system and method for a computer
First Claim
Patent Images
1. A computer system comprising:
- first, second, and third buses;
first, second, and third ports;
first and second interfaces for connecting the first and second buses to the third bus, respectively; and
means for selectively connecting each of the first, second, and third ports to one of either the first or second buses, wherein the means for selectively connecting is responsive to bus requirements of any devices connected to the ports so that the total bus requirements for all the devices is relatively balanced between the first and second interfaces.
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Abstract
A system and method for dynamically switching buses and ports inside a computer. The system configures the connection of first and second buses/ports for buses as USBs or 1394 buses, to another bus such as a PCI bus. The system includes first and second interfaces for connecting the PCI bus to the first and second buses. A switching system selectively connects the first and second buses to a plurality of ports. The switching system is responsive to bus requirements of any devices connected to the ports so that the total requirements for all the devices is balanced between the first and second interfaces.
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Citations
35 Claims
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1. A computer system comprising:
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first, second, and third buses;
first, second, and third ports;
first and second interfaces for connecting the first and second buses to the third bus, respectively; and
means for selectively connecting each of the first, second, and third ports to one of either the first or second buses, wherein the means for selectively connecting is responsive to bus requirements of any devices connected to the ports so that the total bus requirements for all the devices is relatively balanced between the first and second interfaces. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
a control bus connected to the connecting means;
wherein the connecting means is responsive to signals from the control bus.
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4. The computer system of claim 3 wherein the first interface determines the signals on the control bus.
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5. The computer system of claim 3 wherein the first interface determines the signals on the control bus responsive to a bandwidth of a device connected to the first port.
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6. The computer system of claim 3 further comprising:
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a processor connected to the third bus;
wherein the processor determines the signals on the control bus.
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7. The computer system of claim 6 wherein the processor is running an operating system and the processor drives the signals responsive to the operating system.
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8. The computer system of claim 6 wherein the processor is running a BIOS and the processor drives the signals responsive to the BIOS.
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9. A system for configuring a connection between a plurality of ports and a main peripheral bus, the system comprising:
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first and second interfaces connected to the main peripheral bus;
first and second buses connected to the first and second interfaces, respectively; and
a switching system for selectively connecting the plurality of ports to the first and second buses;
wherein the switching system is responsive to bus requirements of any devices connected to the ports so that the total bus requirements for all the devices is relatively balanced between the first and second interfaces. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
a third bus connected to the first interface;
wherein the switching system selectively connects the plurality of ports to the first, second, and third buses responsive to bus requirements of any devices connected to the ports, so that the total bus requirements for all the devices is relatively balanced between the first and second interfaces.
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23. A method for connecting three ports to a shared bus, the method comprising the steps of:
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providing first and second interfaces connected to the shared bus;
providing first and second buses connected to the first and second interfaces, respectively;
selectively connecting the three ports to the first and second buses responsive to bus requirements of any devices connected to the ports so that the total requirements for all the devices is relatively balanced between the first and second interfaces. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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34. A computer comprising:
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a) a processor;
b) a peripheral bus connectable to the processor;
c) first, second, third, and fourth secondary buses;
d) first, second, third, and fourth ports;
e) a first bus interface connected between the peripheral bus and the first and second secondary buses;
f) a second bus interface connected between the peripheral bus and the third and fourth secondary buses;
g) a system for selectively connecting the first, second, third, and fourth secondary buses to the first, second, third, and fourth ports;
h) a control bus for controlling the operation of the system; and
i) a plurality of programming instructions, including;
1) instructions for detecting a first configuration of devices on the first, second, third, and fourth ports;
2) instructions for determining a desired configuration of the first, second, third, and fourth ports; and
3) instructions for activating control signals on the control bus to selectively connect the first, second, third, and fourth secondary buses to the first, second, third, and fourth ports;
wherein the system for selectively connecting is responsive to bus requirements of any devices connected to the ports so that the total bus requirements for all the devices is relatively balanced between the first and second interfaces. - View Dependent Claims (35)
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Specification