Method and apparatus for automatically adjusting the measurement range of admittance level sensors

• US 6,259,259 B1
• Filed: 04/21/1999
• Issued: 07/10/2001
• Est. Priority Date: 04/21/1998
• Status: Expired due to Fees

• Current Assignee: VEGA Grieshaber KG (Grieshaber Verwaltungsgesellschaft mbH)
• Original Assignee: VEGA Grieshaber KG (Grieshaber Verwaltungsgesellschaft mbH)
• Inventors: Woehrle, Siegbert, Raffalt, Felix
• Primary Examiner(s): Metjahic, Safet
• Assistant Examiner(s): KERVEROS, DEMETRIOS C
• Application Number:
  US09/295,708
• Time in Patent Office: 811 Days
• Field of Search: 324/650, 324/658, 324/660, 324/76.66, 324/117.R, 324/610, 324/118
• US Class Current: 324/650
• CPC Class Codes: G01F 23/266 measuring circuits therefor

Abstract

A method for rectifying a sensor current with a synchronous demodulator, wherein the rectifying factor of the synchronous demodulator can be controlled. A control clock pulse signal of the synchronous demodulator is toggled between at least two different states, with the states corresponding to different rectifying factors. The resulting total rectifying factor of the synchronous demodulator can be selected at will by adjusting the pulse duty factor between the at least two states.

Claims

1. Method for evaluating an admittance of a variable capacitance, comprising:

supplying an oscillator voltage to the capacitance, the oscillator voltage having an oscillator frequency; and

evaluating the admittance of the capacitance with an evaluation circuit which includes a synchronous demodulator and produces a measurement signal corresponding to the admittance of the capacitance,

wherein the synchronous demodulator is controlled by a switching signal derived from the oscillator voltage, and the switching signal is toggled between the oscillator frequency and at least a second frequency which is different from the oscillator frequency, so as to adjust a rectifying factor of the synchronous demodulator.

2. Method according to claim 1, wherein the second frequency is a DC signal.

3. Method according to claim 2, wherein the DC signal switches the synchronous demodulator between a high impedance and a short circuit.

4. Method according to claim 1, wherein the rectifying factor of the synchronous demodulator can be selectively adjusted by selecting a frequency ratio between the oscillator frequency and the second frequency.

5. Method according to claim 1, wherein the switching signal is produced by:

shifting a phase of the oscillator voltage,

converting the oscillator voltage to a square wave, and

logically combining the oscillator voltage with another signal.

6. Method according to claim 5, wherein the other signal comprises an output signal of a frequency divider, which frequency divider receives as an input signal the phase-shifted and converted square wave oscillator signal.

7. Method according to claim 1, wherein the second frequency is substantially identical to one half of the oscillator frequency.

8. Method according to claim 1, wherein the switching signal is toggled between the oscillator frequency and the second frequency according to a binary control signal supplied by a microprocessor, with the rectifying factor of the synchronous demodulator determined by a pulse duty factor of the binary control signal.

9. Method according to claim 8, wherein the pulse duty factor of the binary control signal can be adjusted.

10. Method according to claim 8, wherein the rectifying factor is adjusted so that an analog-to-digital converter connected to an output of the synchronous demodulator is modulated over a greatest possible range, without saturating the analog-to-digital converter at a greatest expected value of the capacitance.

11. System for evaluating an admittance of a variable capacitance, comprising:

an oscillator supplying an oscillator voltage to the capacitance, the oscillator voltage having an oscillator frequency;

a current converter having a primary winding, and a secondary winding with two terminals and a center tap, the center tap connected to a zero volt potential, the capacitance coupled to the primary winding;

a synchronous demodulator implemented as a switch having two input terminals, with each input terminal connected to a respective one of the terminals of the secondary winding, and an output terminal, the switch controlled by a switching signal derived from the oscillator voltage and alternatingly connecting the output terminal with the two input terminals;

an evaluation circuit connected to the output terminal of the synchronous demodulator and producing a signal corresponding to the admittance of the capacitance; and

a microprocessor providing a control signal which switches the switching signal of the synchronous demodulator between at least two states corresponding to different rectifying factors of the synchronous demodulator.

12. System according to claim 11, further comprising:

an XOR gate having a first input, a second input, and an output; and

a phase shifter and a square wave generator carrying the oscillator voltage,

wherein a first signal corresponding to the oscillator voltage is supplied to the first input of the XOR gate and a second signal formed from the first signal by frequency division is supplied to the second input of the XOR gate, and the output of the XOR gate supplies the switching signal.

13. System according to claim 12, wherein the phase shifter is adjusted so as to advance a phase of the output signal with respect to the oscillator voltage by 90°

.

14. System according to claim 11, wherein the control signal is synchronized with the oscillator voltage.

15. System according to claim 11, further comprising a current-to-voltage converter and an analog-to-digital converter connected in series, wherein an output of the synchronous demodulator is connected to one of the current-to-voltage converter and the analog-to-digital converter.

16. System according to claim 15, wherein the output of the analog-to-digital converter is connected to an input of the microprocessor.

17. System according to claim 11, wherein the oscillator voltage is supplied to an input of the microprocessor.

18. System according to claim 17, wherein the oscillator voltage is at least one of phase-shifted and converted to a square wave.

19. System according to claim 11, wherein in one of the at least two states the switching signal has a switching frequency equal to the oscillator frequency and in another of the at least two states the switching signal has a switching frequency equal to an even integer fraction of the oscillator frequency.