Liquid crystal display having split data lines

• US 6,259,504 B1
• Filed: 12/21/1998
• Issued: 07/10/2001
• Est. Priority Date: 12/22/1997
• Status: Expired due to Term

• Current Assignee: BOE HYDIS Technology Company Limited (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Choi, Gyo Un, Shin, Jae Hak
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): CHOWDHURY, TARIFUR RASHID
• Application Number:
  US09/217,350
• Time in Patent Office: 932 Days
• Field of Search: 349/106, 349/108, 349/144, 345/89, 345/149
• US Class Current: 349/144
• CPC Class Codes: G02F 1/133514 Colour filters
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A liquid crystal display, comprising: a plurality of gate lines being spaced in a selected distance; a plurality of data lines being spaced in a selected distance, the data lines where a data line driving signal is provided being crossed with the gate lines to define a plurality of R, G and B pixel regions, each of data lines being split into a pair of data lines; a plurality of R, G and B dots disposed in the R, G, and B pixel regions, respectively; and a plurality of switching devices disposed in the R, G, B pixel regions, each being connected to corresponding gate line and data line of a plurality of gate lines and data lines; wherein by the split data lines, each of the R, G and B pixel regions is divided into a plurality of R, G and B sub pixel regions; and each of the R, G and B dots includes a plurality of R, G and B subdots, each of R, G and B subdots being disposed in each of R, G and B sub pixel regions, respectively.

Claims

1. A liquid crystal display, comprising:

a plurality of gate lines being spaced in a selected distance;

a plurality of data lines being spaced in a selected distance, the data lines where a data line driving signal is provided being crossed with the gate lines to define a plurality of R, G and B pixel regions, each of data lines being split into a pair of first and second data lines;

a plurality of R, G and B dots disposed in the R, G, and B pixel regions, respectively; and

a plurality of switching devices disposed in the R, G, B pixel regions, each being connected to corresponding gate line and data line of a plurality of gate lines and data lines;

wherein by the split data lines, each of the R, G and B pixel regions is divided into a plurality of R, G and B sub pixel regions; and

each of the R, G and B dots includes a plurality of R, G and B subdots, each of R, G and B subdots being disposed in each of R, G and B sub pixel regions, respectively.

2. The liquid crystal display as claimed in claim 1, wherein each of the R, G and B dots is comprised of a pair of the R, G and B subdots and each of the R, G and B pixel regions is divided into a pair of the R, G and B subpixel regions and first R, G and B subdots of the pair of R, G and B subdots are disposed to correspond to a first data line of the split data lines and second R, G and B subdot of the pair of R, G and subdots are disposed to correspond to a second data line of the split data lines.

3. The liquid crystal display as claimed in claim 2, wherein R, G and B pixel regions of the plurality of R, G, B pixel regions in adjacent gate lines are left-shifted or right-shifted by one subpixel region along the gate line respectively and the R, G and B dots which are disposed in the R, G are left-shifted or right-shifted by one subdot along the gate line respectively, thereby being arranged with a triangle form.

4. The liquid crystal display as claimed in claim 3, wherein when each of R, G and B pixel regions is split into the pair of R, G and B subpixel regions by the pair of data lines, each of the R, G and B pixel regions which are defined by odd gate lines is divided by the second data line of the split data lines and each of the R, G, B pixel regions which are defined by even gate lines is divided by the first data line.

5. The liquid crystal display as claimed in claim 4, wherein the pair of the split data lines are arranged in parallel with each other and are simultaneously driven by the same data line driving signal.

6. The liquid crystal display as claimed in claim 5, wherein the R, G and B dots are disposed in the R, G and B subpixel regions with a zig-zag form along the data lines and the first R, G and B subdots of the R, G, B dots are disposed in the first R, G and B sub pixel regions of the R, G, B pixel regions which are formed by the odd lines of the plurality of the gate lines and the first data line of the split data lines and the second R, G and B subdots of the R, G, B dots are disposed in the second R, G and B sub pixel regions of the R, G, B pixel regions which are formed by the even lines of the plurality of the gate lines and the second data line of the split data lines, thereby being are overlapped with the first R, G and B subdots.

7. The liquid crystal display as claimed in claim 6, wherein two switching device are disposed every R, G and B dots to drive the pair of R, G and B subdots, respectively.

8. The liquid crystal display as claimed in claim 7, wherein of the two switching device arranged every R, G, B dots, one switching device is disposed in the first subpixel region to be connected with corresponding one of the gate lines and the first data line and another switching device is disposed in the second subpixel region to be connected with corresponding one of the gate lines and the second data line, thereby being oppositely disposed to each other against the data lines between two adjacent gate lines.

9. A liquid crystal display, comprising:

a plurality of gate lines being spaced in a selected distance;

a plurality of data lines being spaced in a selected distance, the data lines where a data line driving signal is provided being crossed with the gate lines, each of data lines being split into a pair of data lines, the split data lines being arranged in parallel with each other and simultaneously driven by the same data line driving signal;

a plurality of R, G and B pixel regions defined by the gate lines and the data lines, each of the R, G and B pixel regions being divided into a pair of R, G and B subpixel regions;

a plurality of R, G and B dots, each of the R, G and B dots being comprised of a pair of R, G and B subdots, each of the R, G and B subdots being disposed in each of the R, G, and B subpixel regions, respectively; and

a plurality of switching devices disposed in the R, G, B pixel regions, each of the switching devices being connected to corresponding gate line and data line of a plurality of gate lines and data lines to drive each of the R, G and B subdots, respectively.

10. The liquid crystal display as claimed in claim 9, wherein R, G and B pixel regions of the plurality of R, G, B pixel regions in adjacent gate lines are left-shifted or right-shifted by one subpixel region along the gate line respectively and the R, G and B dots which are disposed in the R, G are left-shifted or right-shifted by one subdot along the gate line respectively, thereby being arranged with a triangle form.

11. The liquid crystal display as claimed in claim 10, wherein when each of R, G and B pixel regions is split into the pair of R, G and B subpixel regions by the pair of data lines, each of the R, G and B pixel regions which are defined by odd gate lines is divided by the second data line of the split data lines and each of the R, G, B pixel regions which are defined by even gate lines is divided by the first data line.

12. The liquid crystal display as claimed in claim 11, wherein the R, G and B dots are disposed in the R, G and B subpixel regions with a zig-zag form along the data lines and the first R, G and B subdots of the R, G, B dots are disposed in the first R, G and B sub pixel regions of the R, G, B pixel regions which are formed by the odd lines of the plurality of the gate lines and the first data line of the split data lines and the second R, G and B subdots of the R, G, B dots are disposed in the second R, G and B sub pixel regions of the R, G, B pixel regions which are formed by the even lines of the plurality of the gate lines and the second data line of the split data lines, thereby being are overlapped with the first R, G and B subdots.

13. The liquid crystal display as claimed in claim 12, wherein of the two switching device arranged every R, G, B dots, one switching device is disposed in the first subpixel region to be connected with corresponding one of the gate lines and the first data line and another switching device is disposed in the second subpixel region to be connected with corresponding one of the gate lines and the second data line, thereby being oppositely disposed to each other against the data lines between two adjacent gate lines.

14. A liquid crystal display, comprising:

a plurality of gate lines being spaced in a selected distance;

a plurality of data lines being spaced in a selected distance, the data lines where a data line driving signal is provided being crossed with the gate lines, each of data lines being split into a pair of split data lines, the split data lines being arranged in parallel with each other and simultaneously driven by the same data line driving signal;

a plurality of R, G and B pixel regions defined by the gate lines and the data lines, each of the R, G and B pixel regions being divided into a pair of R, G and B subpixel regions;

a plurality of R, G and B dots, each of the R, G and B dots being comprised of a pair of R, G and B subdots, each of the R, G and B subdots being disposed in each of the R, G, and B subpixel regions, respectively; and

a plurality of switching devices disposed in the R, G, B pixel regions, each of the switching devices being connected to corresponding gate line and data line of a plurality of gate lines and data lines to drive each of the R, G and B subdots, respectively;

wherein R, G and B pixel regions of the plurality of R, G, B pixel regions in adjacent gate lines are left-shifted or right-shifted by one subpixel region along the gate line respectively and the R, G and B dots which are disposed in the R, G are left-shifted or right-shifted by one subdot along the gate line respectively, thereby being arranged with a triangle form;

wherein when each of R, G and B pixel regions is split into the pair of R, G and B subpixel regions by the pair of the data lines, each of the R, G and B pixel regions which are defined by odd gate lines is divided by the second data line of the split data lines and each of the R, G, B pixel regions which are defined by even gate lines is divided by the first data line;

wherein the R, G and B dots are disposed in the R, G and B subpixel regions with a zig-zag form along the data lines and the first R, G and B subdots of the R, G, B dots are disposed in the first R, G and B sub pixel regions of the R, G, B pixel regions which are formed by the odd lines of the plurality of the gate lines and the first data line of the split data lines and the second R, G and B subdots of the R, G, B dots are disposed in the second R, G and B sub pixel regions of the R, G, B pixel regions which are formed by the even lines of the plurality of the gate lines and the second data line of the split data lines, thereby being are overlapped with the first R, G and B subdots; and

wherein of the two switching device arranged every R, G, B dots, one switching device is disposed in the first subpixel region to be connected with corresponding one of the gate lines and the first data line and another switching device is disposed in the second subpixel region to be connected with corresponding one of the gate lines and the second data line, thereby being oppositely disposed to each other against the data lines between two adjacent gate lines.