High-efficiency adaptive DC/AC converter
DC CAFCFirst Claim
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1. A DC/AC converter circuit for controllably delivering power to a load, comprising an input voltage source;
- a first plurality of overlapping switches and a second plurality of overlapping switches being selectively coupled to said voltage source, said first plurality of switches defining a first conduction path, said second plurality of switches defining a second conduction path;
a pulse generator generating a first pulse signal;
a transformer having a primary side and a secondary side, said primary side selectively coupled to said voltage source in an alternating fashion through said first conduction path and, alternately, through said second conduction path;
a load coupled to said secondary side of said transformer; and
a feedback control loop circuit receiving a feedback signal indicative of power being supplied to said load, and adapted to generate a second signal pulse signal for controlling the conduction state of said second plurality of switches only if said feedback signal is above a predetermined threshold; and
drive circuitry receiving said pulse signal and controlling a conduction state of said first and second plurality of switches based on said first and second pulse signals, wherein, said drive circuitry alternating the conduction state of said first and second plurality of switches, controlling the overlap time of the switches in the first plurality of switches, and controlling the overlap time of the switches in the second plurality of switches, to couple said voltage source to said primary side.
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Abstract
A CCFL power converter circuit is provided using a high-efficiency zero-voltage-switching technique that eliminates switching losses associated with the power MOSFETs. An optimal sweeping-frequency technique is used in the CCFL ignition by accounting for the parasitic capacitance in the resonant tank circuit. Additionally, the circuit is self-learning and is adapted to determine the optimum operating frequency for the circuit with a given load. An over-voltage protection circuit can also be provided to ensure that the circuit components are protected in the case of open-lamp condition.
348 Citations
42 Claims
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1. A DC/AC converter circuit for controllably delivering power to a load, comprising an input voltage source;
- a first plurality of overlapping switches and a second plurality of overlapping switches being selectively coupled to said voltage source, said first plurality of switches defining a first conduction path, said second plurality of switches defining a second conduction path;
a pulse generator generating a first pulse signal;
a transformer having a primary side and a secondary side, said primary side selectively coupled to said voltage source in an alternating fashion through said first conduction path and, alternately, through said second conduction path;
a load coupled to said secondary side of said transformer; and
a feedback control loop circuit receiving a feedback signal indicative of power being supplied to said load, and adapted to generate a second signal pulse signal for controlling the conduction state of said second plurality of switches only if said feedback signal is above a predetermined threshold; and
drive circuitry receiving said pulse signal and controlling a conduction state of said first and second plurality of switches based on said first and second pulse signals, wherein, said drive circuitry alternating the conduction state of said first and second plurality of switches, controlling the overlap time of the switches in the first plurality of switches, and controlling the overlap time of the switches in the second plurality of switches, to couple said voltage source to said primary side. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
- a first plurality of overlapping switches and a second plurality of overlapping switches being selectively coupled to said voltage source, said first plurality of switches defining a first conduction path, said second plurality of switches defining a second conduction path;
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18. A converter circuit for delivering power to a CCFL load, comprising:
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a voltage source;
a transformer having a primary side and a secondary side;
a first pair of switches and a second pair of switches defining a first and second conduction path, respectively, between said voltage source and said primary side;
a CCFL load circuit coupled to said secondary side;
a pulse generator generating a first pulse signal;
a feedback circuit coupled to said load receiving a feedback signal indicative of power being supplied to said load, and adapted to generate a second signal pulse signal for controlling the conduction state of said second plurality of switches only if said feedback signal is above a predetermined threshold; and
drive circuitry receiving said pulse signal and controlling a conduction state of said first and second plurality of switches based on said first and second pulse signals; and
drive circuitry receiving said pulse signal and said feedback signal and coupling said first pair of switches or said second pair of switches to said voltage source and said primary side based on said first and second pulse signals and said feedback signal to deliver power to said load. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
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35. A method for controlling a zero-voltage switching circuit to deliver power to a load, said method comprising the steps of:
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supplying a DC voltage source;
coupling a first and second transistor defining a first conduction path and a third and fourth transistor defining a second conduction path to said voltage source and a primary side of a transformer;
generating a first pulse signal having a predetermined pulse width;
coupling a load to a secondary side of said transformer;
generating a feedback signal from said load;
generating a second pulse signal by comparing said feedback signal with a threshold signal; and
generating an AC voltage by alternating the conduction state of said first and second transistors with said first pulse signal, and said third and fourth transistors with said second pulse signal only if said feedback signal exceeds said threshold signal. - View Dependent Claims (36, 37, 38, 39, 40, 41, 42)
generating a first and second complementary signals based on said first and second pulse signals;
generating a ramp signal;
comparing said ramp signal to said feedback signal and generating said second pulse signal;
supplying said first pulse signal to said first transistor to control the conduction state thereof and supplying said second pulse signal to said second transistor to control the conduction state thereof;
supplying said first complementary signal to said third transistor to control the conduction state thereof and supplying said second complimentary signal to said fourth transistor to control the conduction state thereof; and
controlling the simultaneous conduction of said first and second transistors, and said third and forth transistors, to deliver power to generate said AC voltage.
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38. A method as claimed in claim 37, further comprising the steps of:
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comparing said feedback signal with a reference signal and generating a first output signal based thereon; and
comparing said first output signal with said ramp signal and generating said second pulse signal.
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39. A method as claimed in claim 35, further comprising the step of controlling said pulse generator based on a voltage signal across said load.
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40. A method as claimed in claim 35, further comprising the step of controlling said pulse generator based on said feedback signal.
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41. A method as claimed in claim 35, further comprising the steps of:
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supplying a first signal indicative of voltage across said primary said and a second signal indicative of the current through said load to a phase-lock circuit;
locking a phase between said first and second signals and generating a control signal based thereon; and
supplying said control signal to said pulse generator to adjust the pulse width of said pulse signal based on a phase difference between said first and second signals.
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42. A method as claimed in claim 37, wherein said step of comparing said first output signal with said ramp signal and generating said second pulse signal further comprises the step of generating said second pulse signal based on the intersection of said ramp signal and said first output signal.
Specification