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Capacitive boosting circuit for the regulation of the word line reading voltage in non-volatile memories

  • US 6,259,635 B1
  • Filed: 01/19/2000
  • Issued: 07/10/2001
  • Est. Priority Date: 01/19/1999
  • Status: Expired due to Term
First Claim
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1. Circuit for the regulation of the row voltage in a memory, comprising a voltage regulator suitable to generate an output regulated voltage to be supplied to one or more rows of the memory when said one or more rows are being selected, the voltage regulator comprising charge boosting means coupled to an output of said voltage regulator and configured to be activated upon the selection of said one or more memory rows in order to boost said regulated voltage upon the selection of said one or more memory rows, said charge boosting means comprise at least one condenser having a first plate coupled to the output of said voltage regulator and a second plate coupled to a voltage signal that is variable between a first potential and a second potential greater than said first potential, said voltage signal passing from said first potential to said second potential upon the selection of said one or more memory rows.

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