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System architecture for and method of processing packets and/or cells in a common switch

  • US 6,259,699 B1
  • Filed: 12/30/1997
  • Issued: 07/10/2001
  • Est. Priority Date: 12/30/1997
  • Status: Expired due to Term
First Claim
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1. A method of simultaneously processing information contained in data cells and data packets or frames received at the egress of a data networking system, that comprises, applying both the received data cells and data packets to a common data switch;

  • controlling the switch for cell and packet data-forwarding, indiscriminatingly using common network hardware and algorithms for forwarding, based on control information contained in the cell or packet and without transforming packets into cells; and

    controlling with a common bandwidth management algorithm both cell and packet data forwarding without impacting the forwarding of either, wherein the cell and packet control information is processed in a common forwarding engine with common algorithms independent of information contained in the cell or packet, and wherein the information from the forwarding engine is passed to a network egress queue manager and thence to a network egress transmit facility and in a manner to provide minimum cell delay variation, and fuirther wherein quality of service information is included in the information passed from the forwarding engine and managed by the queue manager for both cells and packets simultaneously and based upon the common algorithm, with queuing managing processing as each control packet is read from the switch, to put the same into one of a plurality of queues after it is verified that available physical space exists on the queue, and wherein, should there be no such space, the data is put in a drop queue and returned by the switch to the ingress of the network.

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