Moving picture experts group video decoding apparatus and method for supporting replay
First Claim
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1. A moving picture experts group (MPEG) video decoding apparatus for supporting replay, the apparatus comprising:
- memory means for storing a predetermined amount of an input video bit stream which will be decoded and/or replayed;
buffer control means for controlling write of an input video bit stream to said memory means and read of a video bit stream stored in said memory means;
video decoding means for MPEG-decoding a bit stream which is read from said memory means by said buffer control means; and
a store bit stream output means for receiving and storing a video bit stream read from said memory means during a replay mode and sending it to an outer storage medium of large capacity according to a store command.
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Abstract
An MPEG video decoding method using an MPEG video decoding apparatus having a memory for storing a predetermined amount of video bit streams data to support replay, the method comprising the steps of: when in a replay mode, discarding the input video bit stream, instead of storing it in the memory which stores a predetermined amount of the input bit stream to be video-decoded and/or replayed, resulting in fix of a write address pointer; storing an address of a read address pointer in a replay read address pointer and storing an address of the write address pointer in the read address pointer; and subsequently reading and decoding a bit stream starting with a portion corresponding to the address of the read address pointer which is given by the address of the write address pointer while increasing the read address pointer, thereby performing the replay.
33 Citations
23 Claims
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1. A moving picture experts group (MPEG) video decoding apparatus for supporting replay, the apparatus comprising:
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memory means for storing a predetermined amount of an input video bit stream which will be decoded and/or replayed;
buffer control means for controlling write of an input video bit stream to said memory means and read of a video bit stream stored in said memory means;
video decoding means for MPEG-decoding a bit stream which is read from said memory means by said buffer control means; and
a store bit stream output means for receiving and storing a video bit stream read from said memory means during a replay mode and sending it to an outer storage medium of large capacity according to a store command. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
a write address pointer for designating a next write address by increasing its value by one when a bit stream corresponding to a single word has been written;
a read address pointer for designating a next read address by increasing its value by one when a bit stream corresponding to a single word has been read; and
a replay read address pointer for storing an address of said read address pointer according to start of a replay mode.
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4. An MPEG video decoding apparatus according to claim 3, wherein, if a replay command is entered, said buffer control means fixes said write address pointer, stores an address of said read address pointer in said replay read address pointer, jumps said read address pointer to an address designated by said write address pointer, and subsequently reads a bit stream starting with a portion corresponding to the address to which said read address pointer is jumped, before sending it to said video decoding means.
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5. An MPEG video decoding apparatus according to claim 3, wherein said buffer control means jumps said read address pointer to an address of said write address pointer when an address of said read address pointer is equal to an address of said replay read address pointer.
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6. An MPEG video decoding apparatus according to claim 3, wherein, if the replay mode is released, said buffer control means stores an address of said replay read address pointer in said read address pointer, stores an input bit stream in said memory means increasing said write address pointer, and reads a bit stream corresponding to an address designated by said read address pointer increasing said read address pointer.
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7. An MPEG video decoding apparatus according to claim 3, wherein said buffer control means initializes said write address pointer to “
- 0”
when an address of said write address pointer is equal to a maximum address.
- 0”
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8. An MPEG video decoding apparatus according to claim 3, wherein said buffer control means initializes said read address pointer to “
- 0”
when an address of said read address pointer is equal to a maximum address.
- 0”
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9. In an MPEG video decoding method where an input video bit stream is temporarily stored and decoded, an MPEG video decoding method for supporting replay comprising the steps of:
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when in a replay mode, discarding the input video bit stream, instead of storing it in a memory which stores a predetermined amount of the input bit stream to be video-decoded and/or replayed, resulting in fix of a write address pointer;
storing an address of a read address pointer in a replay read address pointer and storing an address of said write address pointer in said read address pointer; and
subsequently reading and decoding a bit stream starting with a portion corresponding to the address of said read address pointer which is given by the address of said write address pointer while increasing said read address pointer, thereby performing the replay. - View Dependent Claims (10, 11, 12, 13, 14, 15)
determining whether a normal play command is entered during a replay mode;
if the normal play command is not entered, determining whether a current address of said read address pointer is equal to the address of said replay read address pointer; and
if the two addresses are equal to each other, storing the address of said write address pointer in said read address pointer and reading and decoding the video bit stream corresponding to the address designated by said read address pointer which is given by the address of said write address pointer.
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11. An MPEG video decoding method according to claim 10, further comprising the step of storing the address of said replay read address pointer in said read address pointer, storing an input bit stream so as to increase said write address pointer, and reading a bit stream corresponding to the address designated by said read address pointer so as to increase said read address pointer when said normal play command is entered.
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12. An MPEG video decoding method according to claim 11, wherein said write address pointer is initialized to “
- 0”
if an address of said write address pointer is equal to a maximum address.
- 0”
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13. An MPEG video decoding method according to claim 11, wherein said read address pointer is initialized to “
- 0”
if an address of said read address pointer is equal to a maximum address.
- 0”
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14. An MPEG video decoding method according to claim 9, wherein said read address pointer is initialized to “
- 0”
if an address of said read address pointer is equal to a maximum address.
- 0”
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15. An MPEG video decoding me-hod according to claim 9, further comprising the step of sending a video bit stream which has been read to an outer storage medium of large capacity when a store command is entered during the replay mode.
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16. An MPEG video decoding apparatus for supporting replay, the apparatus comprising:
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memory means divided into a video buffering verification (VBV) buffer area and a replay buffer area, for storing a video bit stream to be video-decoded in said VBV buffer area and storing a video bit stream to be replayed in said replay buffer area in regular sequence;
buffer control means for controlling write of an input video bit stream to said memory means and read of a video bit stream stored in said memory means;
video decoding means for MPEG-decoding a bit stream which is read from said VBV buffer area or said replay buffer area in said memory means by said buffer control means; and
bit stream compressing means for compressing the bit stream transmitted from said VBV buffer area in said memory means according to control of said buffer control means and sending a compressed bit stream via said buffer control means to said replay buffer area in said memory means. - View Dependent Claims (17, 18, 19, 20, 21)
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22. A moving picture experts group (MPEG) video decoding apparatus for supporting replay, the apparatus comprising:
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memory device that stores a predetermined amount of an input video bit stream which will be decoded and/or replayed;
buffer controller that controls a writing of an input video bit stream to said memory device and a reading of a video bit stream stored in said memory device; and
video decoder that decodes an MPEG bit stream which is read from said memory device by said buffer controller, wherein said memory device is formed in such a manner of expanding a video buffering verification buffer for replay.
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23. A moving picture experts group (MPEG) video decoding apparatus for supporting replay, the apparatus comprising:
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memory device that stores a predetermined amount of an input video bit stream which will be decoded and/or replayed;
buffer controller that controls a writing of an input video bit stream to said memory device and a reading of a video bit stream stored in said memory device; and
video decoder that decodes an MPEG bit stream which is read from said memory device by said buffer controller, wherein said memory device includes;
a write address pointer for designating a next write address by increasing its value by one when a bit stream corresponding to a single word has been written, a read address pointer for designating a next read address by increasing its value by one when a bit stream corresponding to a single word has been read, and a replay read address pointer for storing an address of said read address pointer according to start of a replay mode.
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Specification
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Current AssigneeLG Electronics, Inc. (LG Corporation)
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Original AssigneeLG Electronics, Inc. (LG Corporation)
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InventorsLyu, Hwa Young
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Primary Examiner(s)Le, Vu
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Application NumberUS09/143,353Time in Patent Office1,047 DaysField of Search375/240.25, 375/240.26, 348/419.1, 348/425.1, 386/27, 386/33, 386/109, 386/123US Class Current375/240.25CPC Class CodesH04N 19/152 by measuring the fullness o...H04N 19/423 characterised by memory arr...H04N 19/50 using predictive coding H04...H04N 19/61 in combination with predict...H04N 21/23406 involving management of ser...H04N 21/44004 involving video buffer mana...
