Methods of forming a plurality of semiconductor layers using spaced trench arrays

• US 6,261,929 B1
• Filed: 02/24/2000
• Issued: 07/17/2001
• Est. Priority Date: 02/24/2000
• Status: Expired due to Term

• Current Assignee: North Carolina State University Office of The Vice Chancellor For Research, Outreach and Extension
• Original Assignee: North Carolina State University (University of North Carolina System)
• Inventors: Davis, Robert F., Gehrke, Thomas, Linthicum, Kevin J.
• Primary Examiner(s): Mulpuri, Savitri
• Application Number:
  US09/512,242
• Time in Patent Office: 509 Days
• Field of Search: 438/478, 438/479, 438/480, 438/481, 438/483, 438/412, 438/460, 438/462, 438/931, 257/76
• US Class Current: 438/478
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02447 Silicon carbide
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/0265 Pendeoepitaxy

Abstract

Methods of forming compound semiconductor layers include the steps of forming a plurality of selective growth regions at spaced locations on a first substrate and then forming a plurality of semiconductor layers at spaced locations on the first substrate by growing a respective semiconductor layer on each of the selective growth regions. The first substrate is then divided into a plurality of second smaller substrates that contain only a respective one of the plurality of semiconductor layers. This dividing step is preferably performed by partitioning (e.g., dicing) the first substrate at the spaces between the selective growth regions. The step of forming a plurality of semiconductor layers preferably comprises growing a respective compound semiconductor layer (e.g., gallium nitride layer) on each of the selective growth regions. The growing step may comprise pendeoepitaxially growing a respective gallium nitride layer on each of the selective growth regions. Each of the selective growth regions is also preferably formed as a respective plurality of trenches that have sidewalls which expose compound semiconductor seeds from which epitaxial growth can take place.

Claims

1. A method of forming a semiconductor substrate, comprising the steps of:

forming a plurality of selective growth regions at spaced locations on a first substrate, by forming a first selective growth region as a first plurality of trenches in the first substrate and forming a second selective growth region as a second plurality of trenches in the first substrate;

forming a plurality of semiconductor layers at spaced locations on the first substrate by epitaxially growing a first continuous semiconductor layer from sidewalls of the first plurality of trenches and epitaxially growing a second continuous semiconductor layer from sidewalls of the second plurality of trenches; and

dividing the first substrate into a plurality of second smaller substrates that contain only a respective one of the plurality of semiconductor layers, by partitioning the first substrate along a dicing trench that extends between the selective growth regions and is Wider than a width of each trench in the first plurality of trenches and a width of each trench in the second plurality of trenches.

2. The method of claim 1, wherein said step of forming a plurality of semiconductor layers comprises epitaxially growing a first continuous semiconductor layer as a compound semiconductor layer.

3. The method of claim 2, wherein the compound semiconductor layer comprises gallium nitride.

4. The method of claim 2, wherein said step of epitaxially growing a first continuous semiconductor layer comprises pendeoepitaxially growing a gallium nitride layer from sidewalls of the first plurality of trenches.

5. The method of claim 1, wherein the wide trench constitutes a dicing street;

and wherein said dividing step comprises dicing the first substrate along the dicing street.

6. The method of claim 5, wherein the wide trench is sufficiently wide to enable the first substrate to be diced without dicing the first and second continuous semiconductor layers.

7. The method of claim 4, wherein the first substrate comprises a gallium nitride seed layer;

and wherein said step of forming a first selective growth region comprises selectively etching the gallium nitride seed layer to define a first plurality of trenches therein.

8. The method of claim 7, wherein said step of forming a plurality of semiconductor layers comprises pendeoepitaxially growing a first continuous gallium nitride layer from the gallium nitride seed layer.

9. A method of forming a semiconductor substrate, comprising the steps of:

forming a first selective growth region as a first plurality of trenches in a gallium nitride seed layer;

forming a second selective growth region as a second plurality of trenches in the gallium nitride seed layer;

pendeoepitaxially growing a first continuous gallium nitride layer from sidewalls of the first plurality of trenches;

pendeoepitaxially growing a second continuous gallium nitride layer from sidewalls of the second plurality of trenches; and

partitioning the gallium nitride seed layer between the first plurality of trenches and the second plurality of trenches, to define a first substrate comprising the first continuous gallium nitride layer and a second substrate comprising the second continuous gallium nitride layer.

10. The method of claim 9, wherein the first continuous gallium nitride layer and the second continuous gallium nitride layer have opposing edges that are spaced from each other by a wide trench that extends between adjacent edges of the first selective growth region and the second selective growth region.

11. The method of claim 10, wherein the wide trench constitutes a dicing street;

and wherein said dividing step comprises dicing the first substrate along the dicing street.

12. The method of claim 11, wherein the wide trench is sufficiently wide to enable the first substrate to be diced without dicing the first and second continuous gallium nitride layers.

13. A method of forming a plurality of gallium nitride substrates, comprising the steps of:

forming a plurality of trench arrays at spaced locations in a gallium nitride seed layer, each of said plurality of trench arrays spaced from another trench array by a respective dicing trench;

pendeoepitaxially growing a respective gallium nitride layer on each of the trench arrays; and

dividing the gallium nitride seed layer into a plurality of gallium nitride substrates by dicing the gallium nitride seed layer along a dicing street defined by a dicing trench.

14. The method of claim 13, wherein the plurality of trench arrays are arranged as a two-dimensional grid of trench arrays.

15. The method of claim 14, wherein said step of forming a plurality of trench arrays is preceded by the step of heteroepitaxially forming a gallium nitride seed layer on a substrate.

16. The method of claim 13, wherein said step of forming a plurality of trench arrays is preceded by the step of heteroepitaxially forming a gallium nitride seed layer on a substrate.

17. The method of claim 13, wherein said step of forming a plurality of trench arrays is preceded by the step of forming a gallium nitride seed layer on a substrate that comprises a material selected from the group consisting of silicon, silicon carbide and sapphire.

18. The method of claim 13, wherein said step of pendeoepitaxially growing a respective gallium nitride layer comprises pendeoepitaxially growing on each of the trench arrays a respective gallium nitride layer having an average defect density of less than about 10⁵ cm⁻

3 therein.

19. The method of claim 13, wherein each of the gallium nitride layers has a surface area greater than about 10,000 μ

m².

20. A method of forming a plurality of compound semiconductor substrates, comprising the steps of:

forming a plurality of trench arrays at spaced locations in a compound semiconductor seed layer;

growing a respective compound semiconductor layer on each of the trench arrays; and

dividing the compound semiconductor seed layer into a plurality of compound semiconductor substrates by dicing the compound semiconductor seed layer along dicing streets extending between the plurality of trench arrays.

21. The method of claim 20, wherein the plurality of trench arrays are arranged as a two-dimensional grid of trench arrays.

22. The method of claim 20, wherein said step of forming a plurality of trench arrays is preceded by the step of heteroepitaxially forming a compound semiconductor seed layer on a substrate.

23. The method of claim 22, wherein said step of forming a plurality of trench arrays is preceded by the step of forming a compound semiconductor seed layer on a substrate that comprises a material selected from the group consisting of silicon, silicon carbide and sapphire.

24. The method claim 20, wherein said step of growing a respective compound semiconductor layer comprises pendeoepitaxially growing a respective compound semiconductor layer on each of the plurality of trench arrays.

25. The method claim 23, wherein said step of forming a plurality of trench arrays comprises selectively etching the compound semiconductor seed layer to define a plurality of trenches having sidewalls that expose the compound semiconductor seed layer and the substrate.

26. The method claim 25, wherein said step of growing a respective compound semiconductor layer comprises pendeoepitaxially growing a monocrystalline compound semiconductor layer from the exposed compound semiconductor seed layer.

27. A method of forming a semiconductor substrate, comprising the steps of:

forming first and second semiconductor growth regions that are spaced apart by a dicing trench, on a supporting substrate comprising a semiconductor seed layer, said first semiconductor growth region comprising a first plurality of trenches that extend into the semiconductor seed layer,

simultaneously epitaxially growing first and second continuous semiconductor layers that are spaced apart from each other but overhang a bottom of the dicing trench, from the first and second semiconductor growth regions, respectively, and without forming an epitaxial growth mask in the dicing trench; and

forming first and second semiconductor substrates comprising the first and second continuous semiconductor layers, respectively, by dicing the supporting substrate along the dicing trench.

28. The method of claim 27, wherein said step of simultaneously epitaxially growing first and second continuous semiconductor layers comprises pendeoepitaxially growing the first continuous semiconductor layer from sidewalls of the first plurality of trenches.

29. The method of claim 28, wherein the first continuous semiconductor layer comprises gallium nitride.

30. The method of claim 27, wherein a width of the dicing trench is greater than about ten times a width of a trench in the first plurality of trenches.

31. A method of forming a semiconductor substrate, comprising the steps of:

forming a plurality of selective growth regions at spaced locations on a first substrate, by forming a first selective growth region as a first plurality of trenches in the first substrate and forming a second selective growth region as a second plurality of trenches in the first substrate;

forming a plurality of semiconductor layers at spaced locations on the first substrate by growing a first continuous semiconductor layer from at least portions of first mesas defined by the first plurality of trenches and growing a second continuous semiconductor layer from at least portions of second mesas defined by the second plurality of trenches; and

dividing the first substrate into a plurality of second smaller substrates that contain only a respective one of the plurality of semiconductor layers, by partitioning the first substrate between the selective growth regions.

32. The method of claim 31, wherein said step of forming a plurality of semiconductor layers comprises epitaxially growing a first continuous semiconductor layer as a compound semiconductor layer.

33. The method of claim 32, wherein the compound semiconductor layer comprises gallium nitride.

34. The method of claim 32, wherein said step of epitaxially growing a first continuous semiconductor layer comprises pendeoepitaxially growing a gallium nitride layer from sidewalls of the first plurality of trenches.

35. The method of claim 31, wherein the portions of first mesas defined by the first plurality of trenches comprise top surfaces of the first mesas.

36. The method of claim 33, wherein the portions of first mesas defined by the first plurality of trenches comprise top surfaces of the first mesas.