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Substrate strip for use in packaging semiconductor chips

  • US 6,262,490 B1
  • Filed: 11/05/1999
  • Issued: 07/17/2001
  • Est. Priority Date: 11/05/1999
  • Status: Expired due to Term
First Claim
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1. A substrate strip comprising:

  • a plurality of substrate units on a surface of the substrate strip, each substrate unit being adapted for mounting a semiconductor chip;

    a plurality of degating regions on the surface of the substrate strip at locations such that the edges of mold runners and gates of a mold used to encapsulate the semiconductor chips in encapsulant material fit entirely within the degating regions when the substrate strip is placed in the mold during encapsulation of the semiconductor chips, wherein each degating region has a buffer region at a location corresponding to the gate of the mold during encapsulation; and

    a degating region material formed on the degating regions with the buffer regions not coated with the degating region material, wherein the adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate strip.

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