TFT array inspection method and device

• US 6,262,589 B1
• Filed: 05/24/1999
• Issued: 07/17/2001
• Est. Priority Date: 05/25/1998
• Status: Expired due to Fees

• Current Assignee: Asian Electronics Limited
• Original Assignee: Asian Electronics Limited
• Inventors: Tamukai, Tadashi
• Primary Examiner(s): KARLSEN, ERNEST F
• Application Number:
  US09/317,202
• Time in Patent Office: 785 Days
• Field of Search: 324/770, 324/681, 324/684, 324/769
• US Class Current: 324/760.02
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309

Abstract

The pixel capacitances of an LCD array can be inspected easily and in a short time without being affected by the capacitance of the tester system. On the first occasion, pixel capacitance C_P is charged with pixel voltage V_P and line capacitance C_S (C_S>>C_P) that is connected in parallel with pixel capacitance C_P is charged with set voltage V_S (V_P≠V_S). By connecting pixel capacitance C_P and line capacitance C_S is parallel, the difference voltage ΔV_S1 of the voltage of the line capacitance C_S after the parallel connection and the set voltage V_S that is charged thereon before the parallel connection is measured. On the second occasion, pixel capacitance C_P is charged with pixel voltage V_P and a known reference capacitance ΔC_S is connected in parallel with line capacitance C_S, this being charged with set voltage V_S. By further connecting in parallel pixel capacitance C_P with the parallel-connected line capacitance and reference capacitance ΔC_S, the difference voltage ΔV_S2 of the line capacitance C_S after this parallel connection and the set voltage V_S that was charged thereon prior to the parallel connection is measured. The pixel capacitance C_P is found from these difference voltages ΔV_S1, ΔV_S2 measured on the first and second occasion and an equation C_P=ΔC_S·ΔV_S1·ΔV_S2/((V_P−V_S)·(ΔV_S1−ΔV_S2)) derived from the difference voltages.

Claims

1. A method of TFT array inspection comprising the steps of:

charging a pixel capacitance C_P constituting a pixel of a TFT array with a pixel voltage V_P having a known value and charging an additional capacitance C_T (C<sub>T>

>

CP</sub>) with a set voltage V_S (V_P≠

V_S) having a known value, said additional capacitance C_T including at least a line capacitance C_S (C_S>

>

C_P) having an unknown value and said additional capacitance C_T being connected in parallel with said pixel capacitance C_P during inspection of said pixel, after the charging of both of these, connecting said pixel capacitance C_P and said additional capacitance C_T in parallel, and measuring a difference voltage Δ

V_S between a voltage V_a of said additional capacitance C_T after the parallel connection and said set voltage V_S, said charging and said connecting of said pixel capacitance C_P and said additional capacitance C_T and said measuring being conducted at least twice, by changing a value of said additional capacitance C_T with use of at least one reference capacitance Δ

C_S having a known value, thereby measuring at least two difference voltages Δ

V_S having difference values; and

inspecting said pixel based on at least these two measured difference voltages Δ

V_S and the following equation representing these difference voltages Δ

V_S;

2. The method of TFT array inspection according to claim 1 wherein,

first, said pixel capacitance C_P is charged with said pixel voltage V_P and said additional capacitance C_T comprising said line capacitance C_S is charged with said set voltage V_S, after charging C_P and C_T, said pixel capacitance C_P and said additional capacitance C_T are connected in parallel and a difference voltage V_S1 between a voltage V_a1 of said additional capacitance C_T after the parallel connection and said set voltage V_S is measured;

next, said pixel capacitance C_P is charged with said pixel voltage V_P and said reference capacitance Δ

C_S is connected in parallel with said line capacitance C_S and said additional capacitance C_T comprising this parallel-connected circuit is charged with said set voltage V_S, after C_T and C_P have been charged, said pixel capacitance C_P is further connected in parallel with said additional capacitance C_T and a difference voltage Δ

Vs₂ between a voltage V_a2 of said additional capacitance C_T after this parallel connection and said set voltage V_S is measured, and a pixel parameter is inspected to see whether said pixel parameter is correct, based on at least one difference voltage of said two measured difference voltages Δ

Vs₁ and Δ

V_s2; and

a value of said pixel capacitance C_P is obtained based on these two measured difference voltages Δ

V_S1 and Δ

V_S2 and the following equation;

3. The method of TFT array inspection according to claim 2 wherein, said pixel parameter includes a plurality of pixel parameters including at least a leakage value of said pixel capacitance C_P;

said plurality of pixel parameters are divided into said leakage value and pixel parameters other than said leakage value; and

said leakage value is inspected based on one difference voltage of said two difference voltages Δ

V_S1 and Δ

V_S2 while said pixel parameters other than said leakage value are inspected based on the other difference voltage of said two difference voltages.

5. The method of TFT array inspection according to claim 1 wherein,

a pixel parameter is inspected to see whether said pixel parameter is correct, based on at least one difference voltage Δ

V_S of said at least two difference voltages Δ

V_S; and

obtaining a value of said pixel capacitance C_P based on said at least two difference voltages Δ

V_S and said equation.

11. The method of TFT array inspection according to claim 5 wherein, said predetermined equation is the following equation:

12. The method of TFT array inspection according to claim 2 wherein, said pixel inspecting process is adapted to inspect a pixel parameter to see whether said pixel parameter is good or not, based on at least one difference voltage Δ

V_S of said at least two difference voltages Δ

V_S.

4. A TFT array inspection device comprising:

a power source capable of selectively applying two voltages, namely, a pixel voltage V_P and a set voltage V_S (V_P≠

V_S);

a pixel of a TFT array including a pixel capacitance C_P and a TFT switch SW₁ connected in series to this pixel capacitance C_P;

a line for connecting said power source to said pixel;

a line capacitance C_S (C_S>

>

C_P) connected in parallel with said pixel capacitance C_P on said pixel inspection;

a reference capacitance Δ

C_S having a known value;

a switch SW₂ for connecting in parallel or isolating said reference capacitance Δ

C_S with respect to said line capacitance C_S;

a switch SW₃ for turning ON/OFF said line; and

a calculation control circuit whereby said pixel is inspected by controlling ON/OFF of said TFT switch SW₁, switches SW₂ and SW₃, wherein said calculation control circuit performs ON/OFF of said TFT switches SW₁, switches SW₂ and SW₃, such that first of all, said pixel capacitance C_P is charged with said pixel voltage V_P by connecting said power source to said line and said line capacitance C_S is charged with said set voltage V_S by isolating said pixel capacitance C_P from said line, after charging up both of these, said power source and said pixel are isolated and said pixel capacitance C_P and said line capacitance C_S are connected in parallel whereby a difference voltage Δ

V_S1 between a voltage V_a1 of said line capacitance C_S after the parallel connection and said set voltage Δ

V_S is measured;

next, said reference capacitance Δ

C_S and said line capacitance C_S are connected in parallel, said power source is connected to said line thereby charging up said pixel capacitance C_P with said pixel voltage C_P, and, by isolating said pixel capacitance C_P from said line, said reference capacitance Δ

C_S and said line capacitance C_S that were connected in parallel are charged with said set voltage V_S and, after charging up both of these, said pixel voltage V_P charged on to said pixel capacitance C_P for a prescribed time is held, and said pixel capacitance C_P after the lapse of a prescribed time is further connected in parallel with said parallel-connected reference capacitance Δ

C_S and said line capacitance C_S whereby a difference voltage Δ

V_S2 between a voltage V_a2 of said line capacitance C_S after the parallel connection and said set voltage Δ

V_S is measured,

wherein a pixel parameter is inspected based on at least one difference voltage of said difference voltages Δ

V_S1 and Δ

V_S2, and a value of said pixel capacitance C_P is obtained based on said difference voltages Δ

V_S1 and Δ

V_S2 and the following equation;

6. A method of TFT array inspection comprising:

a capacitance value setting process of setting at least two values as a value of an additional capacitance C_T by changing the value of said additional capacitance C_T with use of at least one reference capacitance Δ

C_S having a known value, said additional capacitance C_T including at least a line capacitance Cs having an unknown value and said additional capacitance C_T being connected in parallel with a pixel capacitance C_P constituting a pixel of a TFT array, during inspection of said pixel;

a charging process of charging said pixel capacitance C_P with a pixel voltage V_P having a known value and charging said additional capacitance C_T with a set voltage V_S having a known value different from said pixel voltage V_P;

every time each of said at least two values of said additional capacitance C_T is set by said capacitance value setting process;

a difference voltage measuring process of measuring at least two difference voltages Δ

V_S having different values by measuring a difference voltage Δ

V_S between said set voltage V_S and a voltage V_a of said additional capacitance C_T after a parallel connection wherein said pixel capacitance C_P and said additional capacitance C_T are connected in parallel every time after said charging process is finished; and

a pixel inspecting process of inspecting said pixel based on said at least two difference voltages Δ

V_S measured by said difference voltage measuring process.

7. The method of TFT array inspection according to claim 6 wherein,

said capacitance value setting process is adapted to set two values as a value of said additional capacitance C_T; and

said difference voltage measuring process is adapted to measure two difference voltages Δ

V_S as said at least two difference voltages Δ

V_S.

8. The method of TFT array inspection according to claim 6 wherein,

a value of said pixel voltage C_P is set to be a smaller value than that of said set voltage V_S;

and

said charging process is adapted to charge said pixel capacitance C_P with said pixel voltage V_P and to charge said additional capacitance C_T with said set voltage V_S by charging said additional capacitance C_T with said set voltage V_S after charging simultaneously said pixel capacitance C_P and said additional capacitance C_T with said pixel voltage V_P.

9. The method of TFT array inspection according to claim 6 wherein,

said pixel inspecting process is adapted to obtain a value of said pixel capacitance C_P based on said at least two difference voltages Δ

V_S and a predetermined equation representing said at least two difference voltages Δ

V_S.

10. The method of TFT array inspection according to claim 9 wherein, said predetermined equation is the following equation:

13. The method of TFT array inspection according to claim 8 wherein, said pixel parameter includes a plurality of pixel parameters including a leakage value of said pixel capacitance C_P;

and

said pixel inspecting process is adapted to divide said plurality of pixel parameters into said leakage value and pixel parameters other than said leakage value so as to inspect said leakage value and said pixel parameters other than said leakage value based on respective different voltages Δ

V_S.

14. The method of TFT array inspection according to claim 6 wherein, said pixel inspecting process comprises:

a pixel capacitance detecting process of detecting a value of said pixel capacitance C_P based on said at least two difference voltages Δ

V_S and a predetermined equation representing said at least two difference voltages Δ

V_S and a predetermined equation representing said at least two difference voltages Δ

V_S; and

a pixel parameter inspecting process of inspecting a pixel parameter to see whether said pixel parameter is good or not, based on at least one difference voltage Δ

V_S of said at least two difference voltages Δ

V_S.

15. A TFT array inspection device comprising,

a capacitance value setting system which sets at least two values as a value of an additional capacitance C_T by changing the value of said additional capacitance C_T with use of at least one reference capacitance Δ

C_S having a known value, said additional capacitance C_T including at least a line capacitance C_S having an unknown value and said additional capacitance C_T being connected in parallel with a pixel capacitance C_P constituting a pixel of a TFT array, during inspection of said pixel;

a charging system which charges said pixel capacitance C_P with a pixel voltage V_P having a known value and which charges said additional capacitance C_T with a set voltage V_S having a known value different from said pixel voltage V_P, every time each of said at least two values of said additional capacitance C_T is set by said capacitance value setting system;

a difference voltage measuring system which measures at least two difference voltages Δ

V_S having different values by measuring a difference voltage Δ

V_S between said set voltage V_S and a voltage V_a of said additional capacitance C_T after a parallel connection wherein said pixel capacitance C_P and said additional capacitance C_T are connected in parallel every time after a charging process of said charging system is finished; and

a pixel inspecting system which inspects said pixel based on said at least two difference voltages Δ

V_S measured by said difference voltage measuring system.