Pre-equilibrium chemical reaction energy converter

• US 6,268,560 B1
• Filed: 06/07/2000
• Issued: 07/31/2001
• Est. Priority Date: 05/04/1999
• Status: Expired due to Term

• Current Assignee: NeoKismet, LLC
• Original Assignee: NeoKismet, LLC
• Inventors: Gidwani, Jawahar M., Zuppero, Anthony C.
• Primary Examiner(s): CHAPMAN, MARK A
• Application Number:
  US09/589,553
• Time in Patent Office: 419 Days
• Field of Search: 136/253, 136/254, 310/300
• US Class Current: 136/253
• CPC Class Codes: H01L 29/66 Types of semiconductor device ; Multistep manufacturing processes therefor
• CPC Class Codes: H02N 11/002 Generators
• CPC Class Codes: H02N 2/18 producing electrical output from mechanical input, e.g. generators for measurement devices G01
• CPC Class Codes: H02S 99/00 Subject matter not provided for in other groups of this subclass
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy
• CPC Class Codes: Y10S 136/291 Applications

Abstract

The use of newly discovered chemical reaction products, created when reactants combine to form products on the surface of a catalyst, to generate electricity, beams of radiation or mechanical motion. The invention also provides methods to convert the products into electricity or motion. The electric generator consists of a catalyst nanocluster, nanolayer or quantum well placed on a substrate consisting of a semiconductor diode, and a semiconductor diode on the surface of the substrate near the catalyst. The device to generate mechanical motion consists of a catalyst nanocluster, nanolayer or quantum well placed on a substrate, and a hydraulic fluid in contact with the non-reaction side of the substrate, with the surfaces of both the catalyst and substrate mechanically formed to enhance the unidirectional forces on the fluid. Both devices use a fuel-oxidizer mixture brought in contact with the catalyst. The apparatus converts a substantial fraction of the reaction product energy into useful work during the brief interval before such products equilibrate with their surroundings.

Claims

1. A device for generating electricity, comprising:

a catalyst, and

a substrate, wherein the catalyst is arranged on the substrate and the substrate includes a substrate diode to receive charge carriers from the catalyst,

wherein upon introducing a fuel and an oxidizer in contact with the catalyst, charge carriers are emitted by the catalyst and an electrical potential is developed across the substrate diode.

2. The device of claim 1 comprising a non-conducting layer arranged between the substrate diode and the catalyst, wherein the non-conducting layer permits control over a forward-bias and forward current characteristic of the substrate diode.

3. The device of claim 2, wherein the catalyst has a thickness of one nanometer or less.

4. The device of claim 1 comprising a surface diode, the surface diode being arranged on a reactant side of the catalyst to receive and capture electrons.

5. The device of claim 4, wherein the surface diode comprises an InGaAsSb semiconductor.

6. The device of claim 4, wherein the surface diode is a Schottky diode having a band gap larger than a bond energy or a reaction energy.

7. The device of claim 1, wherein the substrate diode is a Schottky diode having a barrier height in a range of 0.05 to 0.4 volts.

8. The device of claim 1, wherein the substrate diode is forward biased so as to raise its conduction and valence bands above a fermi level of the catalyst so as to match energy levels of the adsorbed species.

9. The device of claim 1, wherein the substrate diode comprises an InGaAsSb semiconductor.

10. The device of claim 1, wherein the fuel includes at least one of ethanol, methanol and hydrogen.

11. The device of claim 1, wherein the substrate diode is a Schottky diode having a band gap larger than an energy of reactions on a surface of the catalyst.

12. The device of claim 4, wherein the surface diode is a Schottky diode having a barrier height in a range of 0.05 to 0.4 volts.

13. The device of claim 1, wherein the catalyst includes at least one of platinum and palladium.

14. The device of claim 1, wherein the catalyst includes at least one of a quantum well and a quantum dot having a thickness sufficiently small so as to alter a density of electron states in the catalyst to favor the production of substantially monoenergetic holes or electrons.

15. The device of claim 1, comprising a layer of metal arranged between the substrate diode and the catalyst, wherein the layer of metal matches a catalyst lattice parameter and allows the metal and catalyst layers to be formed as a quantum well.

16. The device of claim 1, wherein the substrate diode includes an n-type direct band gap semiconductor having a band gap which favors emission of energetic electrons.

17. The device of claim 1, wherein a dimension of the catalyst is sufficiently small so as to have properties unlike the same material in bulk.

18. The device of claim 1, wherein the catalyst includes at least one of gold, silver, copper, and nickel.

19. The device of claim 1 comprising a coolant on a bottom surface of the device.

20. The device of claim 1, wherein the catalyst operates at a peak surface power density greater than one watt per square centimeter.

21. The device of claim 1 comprising an electrical storage device, the electrical storage device being coupled to the substrate diode, wherein the electrical storage device includes at least one of a capacitor, a super-capacitor and a battery.

22. The device as claimed in claim 1, further including:

23. The device as claimed in claim 22, wherein the substrate diode includes a p-n junction diode.

24. The device as claimed in claim 23, wherein the p-n junction diode includes:

a first electrode in contact with the catalyst;

an n-type semiconductor in contact with the first electrode;

a p-type semiconductor adjacent to the n-type semiconductor, forming a p-n junction; and

a second electrode in contact with the p-type semiconductor, wherein the p-n junction diode is enabled to collect holes.

25. The device as calimed in claim 23, wherein the p-n junction diode includes:

a first electrical connection and interlayer in contact with the catalyst;

a p-type semiconductor in contact with the first electrical connection and the electrode interlayer;

an n-type semiconductor adjacent to the p-type semiconductor, forming a p-n junction; and

a second electrical connection in contact with the n-type semiconductor,

wherein the p-n junction diode is enabled to collect electrons.

26. The device as claimed in claim 1, wherein material of the catalyst forms a part of a substrate.

27. The method for generating electricity, comprising:

forming a reacting surface with one or more catalysts; and

arranging the reacting surface with one or more catalysts on a substrate, wherein the substrate includes a diode to receive charge carriers from the one or more catalyst,

wherein upon introducing a fuel and an oxidizer in contact with the one or more catalysts, charge carriers are emitted by the one or more catalysts and an electrical potential is developed across the diode.

28. The method of generating electricity as claimed in claim 27, further including:

arranging the diode in contact with the reacting surface.

29. The method of generating electricity as claimed in claim 27, wherein the diode is a semiconductor diode.

30. The method of generating electricity as claimed in claim 27, wherein the one or more catalysts includes one of nanolayer and nanocluster.

31. The method of generating electricity as claimed in claim 27, further including:

placing the diode near the one or more catalysts.

32. The method of generating electricity as claimed in claim 31, wherein a distance between the one or more catalysts and the semiconductor diode is less than approximately a mean free path of a ballistic charge carrier originating in the one or more catalysts.

33. The method of generating electricity as claimed in claim 27, further including:

placing the diode adjacent to the one or more catalysts.

34. The method of generating electricity as claimed in claim 27, further including:

placing the diode under the one or more catalysts.

35. The method as claimed in claim 27, wherein the charge carriers are converted into difference in Fermi level across the diode.

36. The method as claimed in claim 35, wherein the diode includes a Schottky junction diode.

37. The method as claimed in claim 36, further including using an n-type semiconductor to collect one or more electrons.

38. The method as claimed in claim 36, further including using a p-type semiconductor to collect one or more holes.

39. The method as claimed in claim 36, wherein a conduction band of the Schottky junction diode matches a desired energy level of the charge carriers.

40. The method as claimed in claim 39, wherein the conduction band gap is in excess of 0.05 volts.

41. The method as claimed in claim 35, wherein the diode includes a p-n junction diode.

42. The method as claimed in claim 41, wherein the p-n junction diode of a semiconductor has band gap matching a selected energy level of the charge carriers on the reacting surface.

43. The method as claimed in claim 41, wherein the p-n junction diode includes a Schottky barrier between an electrode and a semiconductor of the p-n junction diode.

44. The method as claimed in claim 43, wherein the Schottky barrier is less than 0.4 electron volts.

45. The method as claimed in claim 41, wherein the p-n junction diode is formed diode from a bipolar semiconductor.

46. The method as claimed in claim 43, wherein the bipolar semiconductor is an alloy of InGaAsSb.

47. The method as claimed in claim 41, wherein the p-n junction diode is forward biased so that its conduction band matches a selected energy level of the charge carriers.

48. The method as claimed in claim 27, wherein the diode is formed from a bipolar semiconductor material.

49. The method as claimed in claim 35, wherein the bipolar semiconductor material includes InGaAsSb.

50. The method as claimed in claim 35, further including tailoring InGaAsSb ratio to provide a band gap matching energy transitions of the charge carriers.

51. The method as claimed in claim 48, further including arranging a non-conducting layer between the diode and the one or more catalysts.

52. The method as claimed in claim 48, further including arranging an oxide barrier between the one or more catalysts and the diode.

53. The method as claimed in claim 52, wherein the arranging includes placing the oxide barrier between the one or more catalysts and the diode.

54. The method as claimed in claim 52, wherein the arranging includes placing the oxide barrier between the one or more catalysts and a semiconductor in the diode.

55. The method as claimed in claim 52, wherein thickness of the oxide barrier is less than ballistic transport dimension of a charge carrier that forward biases the diode.

56. The method as claimed in claim 52, wherein thickness of the oxide barrier is less than 100 nanometers.

57. The method as claimed in claim 27, wherein the diode includes a semiconductor diode having low barrier.

58. The method as claimed in claim 27, further including:

forming the one or more catalysts into one or mor quantum well structures including one of layer, island, pancake, and quantum dot.

59. The method as claimed in claim 58, wherein the one or more quantum well structures include less than 200 atoms.

60. The method as claimed in claim 58, wherein the one or more catalysts are formed from one of gold, silver, copper, and nickel.

61. The method as claimed in claim 27, further including:

forming the one or more catalysts into one or more atomically smooth superlattice.

62. The method as claimed in claim 27, wherein the one or more catalyst are formed into one or more structures having a thickness dimension less than 10 monolayers.

63. The method as claimed in claim 62, wherein the monolayers include less than 200 atoms.

64. The method as claimed in claim 27, wherein the diode is formed with one or more combination of metal- semiconductor-oxide structure.

65. The method as claimed in claim 27, wherein the diode is a semiconductor diode and the method further includes forming an electrode interlayer connecting the one or more catalysts to the semiconductor diode wherein, the electrode interlayer forms an electrical connection to the semiconductor diode.

66. The method as claimed in claim 65, wherein thickness of the electrode interlayer is less than mean free path of charge carriers causing forward bias of the diode.

67. The method of claim 66, wherein the thickness is less than 200 nanometers.

68. The method of claim 65, wherein the electrical connection interlayer is formed from one of Mg, Sb, Al, Ag, Sn, Cu, and Ni.

69. The method of claim 65, wherein the interlayer is formed from a metal that matches a lattice parameter of the one or more catalysts to within 5%.

70. The method a generating electricity, comprising:

forming energized products on a reacting surface having one or more catalysts;

collecting charge carrier energy from the energized products in an energy converter formed with a diode; and

converting the charge carrier energy into chemical potential across a diode junction of the diode.

71. The method as claimed in claim 71, further including:

forward biasing the diode.

72. The method as claimed in claim 71, wherein the diode is a Schottky diode and the forward bias is in excess of 0.05 volts.

73. The method as claimed in claim 71, wherein the diode is a p-n junction diode and the forward bias is in excess of 0.05 volts.

74. The method as claimed in claim 71, further including operating the diode wherein its conduction band matches a selected energy level of the energized products.