Electrical wiring board and method for identifying same

• US 6,268,616 B1
• Filed: 04/25/1996
• Issued: 07/31/2001
• Est. Priority Date: 04/26/1995
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kamekawa, Eiichiro
• Primary Examiner(s): Graybill, David E.
• Application Number:
  US08/639,323
• Time in Patent Office: 1,923 Days
• Field of Search: 438/15, 438/16, 438/14, 257/48, 257/773, 257/786
• US Class Current: 257/48
• CPC Class Codes: H01L 2223/5442 comprising non digital, non alphanumeric information, e.g. symbols
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 1/0266 Marks, test patterns or identification means
• CPC Class Codes: H05K 1/0268 for electrical inspection or testing
• CPC Class Codes: H05K 1/11 Printed elements for providing electric connections to or between printed circuits
• CPC Class Codes: H05K 2201/09781 Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
• CPC Class Codes: H05K 2201/09927 Machine readable code, e.g. bar code
• CPC Class Codes: H05K 3/3457 Solder materials or compositions; Methods of application thereof

Abstract

An electrical wiring boards 10 having the same specifications are provided with a plurality of lands for identification 12a to 12e and identification of the type of the final product is carried out by applying solder onto one land for identification 12b corresponding to the final product.

Claims

1. A completed printed circuit board, comprising:

a substrate including wiring patterns suitable for plural specifications, the substrate being made from glass cloth, paper board, epoxy resin or coppered laminated sheet;

electrical components mounted on the substrate;

a plurality of identifying lands free from mounting an electrical component; and

solder applied on at least one of the identifying lands so as to form a visual pattern such that one or more of the identifying lands each have a visual deposit of solder thereon and such that one or more of the remaining identifying lands do not have a visual deposit of solder thereon, which visual pattern indicates a resulting specification of the completed circuit board.

2. A completed printed circuit board according to claim 1, wherein the plurality of identifying lands are arrayed in a line.

3. A completed printed circuit board according to claim 1, wherein each of the plurality of identifying lands is accompanied by a mark disposed nearby and the visual pattern includes the marks.

4. A completed printed circuit board according to claim 1, wherein the identifying lands function as testing pads for the completed printed circuit board.

5. A completed printed circuit board comprising:

a substrate made from glass cloth or paper board impregnated with epoxy resin, or laminated sheet thereof and having wiring patterns thereon,

electrical components mounted on the substrate and electrically connected with the wiring patterns through solder,

a plurality of identification lands having a surface free from any mounted components, and

a visual deposit of solder disposed on at least one of the plurality of identification lands so that one or more of the identification lands each have the visual deposit of solder thereon and one or more of the remaining identification lands do not have a visual deposit of solder thereon, thereby forming a visual pattern identifying a resulting specification of the completed printed circuit board.

6. A completed printed circuit board according to claim 5, wherein a plurality of identifying lands are arrayed in a line.

7. A completed printed circuit board according to claim 5, wherein each of the plurality of identifying lands is accompanied by a mark disposed nearby, and the visual pattern includes the marks.

8. A completed printed circuit board according to claim 5, wherein the identifying lands function as testing pads for the completed printed circuit board.