Ferroelectric memory device capable of adjusting bit line capacitance
First Claim
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1. A ferroelectric memory device, comprising:
- a plurality of word lines, a plurality of plate lines, a plurality of bit lines, and a plurality of memory cells, wherein said memory cells comprise ferroelectric capacitors and selection transistors; and
said ferroelectric memory device further comprising;
a bit line capacitance variation device which changes the bit line capacitance according to the potential of said bit lines.
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Abstract
Bit line capacitance variation devices are respectively connected to the bit lines contained in a ferroelectric memory device. These bit line capacitance variation devices change the capacitance of bit lines according to the bit line potential during operations for reading data from the ferroelectric memory device.
6 Citations
11 Claims
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1. A ferroelectric memory device, comprising:
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a plurality of word lines, a plurality of plate lines, a plurality of bit lines, and a plurality of memory cells, wherein said memory cells comprise ferroelectric capacitors and selection transistors; and
said ferroelectric memory device further comprising;
a bit line capacitance variation device which changes the bit line capacitance according to the potential of said bit lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification