Fabrication process for reduced area storage node junction

• US 6,271,071 B1
• Filed: 04/06/1998
• Issued: 08/07/2001
• Est. Priority Date: 11/16/1995
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Gonzalez, Fernando
• Primary Examiner(s): TSAI, H JEY
• Application Number:
  US09/056,419
• Time in Patent Office: 1,219 Days
• Field of Search: 438/253-256, 438/390-398, 438/238, 438/286, 438/653, 438/649, 438/682
• US Class Current: 438/238
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor

Abstract

An improved storage node junction between a doped active area in a semiconductor substrate and an overlying layer of polysilicon, such as the storage node junction in a DRAM memory cell. The area and perimeter of the storage node junction is significantly reduced and the junction is moved away from the adjacent isolation structure. An exemplary semiconductor device incorporating the new junction includes a storage node junction between a conductive polysilicon layer and an active area on a semiconductor substrate, the substrate having been subjected to LOCOS steps to create active areas bounded by a region of field oxide. An insulated gate electrode is formed over an active area on the substrate, which has been doped to a first conductivity type. A contact region comprising a portion of the active area extends laterally between one side of the gate electrode and the field oxide region. The contact region has a first segment adjacent to the gate electrode and a second segment interposed between the first segment and the field oxide region. The first segment is thereby isolated from the field oxide region by the second segment. The first segment is doped to a second conductivity type. A layer of storage polysilicon is formed in electrical contact with the first segment of the contact region but not the second segment of the contact region. The storage polysilicon is isolated from the field oxide through an insulating layer interposed between the storage polysilicon and the second segment of the contact region.

Claims

1. A process for making a semiconductor device, comprising:

a. forming on a substrate an active area at least partially bounded by an isolation structure;

b. defining a contact region in the active area;

c. defining a first segment of the contact region and forming diffusion barrier over the first segment of the contact region;

d. defining a second segment of the contact region between the first segment and the isolation structure to electrically isolate the first segment from the isolation structure; and

e. forming a conductive element having a generally horizontal portion over both segments of the contact region, the generally horizontal portion of the conductive element in electrical contact with the first segment of the contact region and electrically isolated from the second segment.

2. A process according to claim 1, further comprising the steps of:

a. providing a first conductivity type substrate; and

b. doping the first segment to a second conductivity type opposite the first conductivity type.

3. A process for making a semiconductor device having a junction between a polysilicon conductor and a substrate, the process comprising the steps of:

a. forming on the substrate an active area at least partially bounded by an isolation structure;

b. defining a contact region in the active area;

c. defining a first segment of the contact region and forming diffusion barrier over the first segment of the contact region;

d. defining a second segment of the contact region between the first segment and the isolation structure to electrically isolate the first segment from the isolation structure; and

e. forming a polysilicon conductor having a generally horizontal portion over both segments of the contact region, the generally horizontal portion of the polysilicon conductor in electrical contact with the first segment of the contact region and electrically isolated from the second segment.

4. A process according to claim 3, further comprising forming a diffusion barrier between the polysilicon conductor and the first segment of the contact region.

5. A process according to claim 3, further comprising forming insulating material between the polysilicon conductor and the second segment of the contact region.

6. A process for making a semiconductor device, comprising:

a. forming on a substrate an active area at least partially bounded by an isolation structure;

b. defining a contact region in the active area along a surface of the substrate adjacent to the isolation structure;

c. defining a first segment of the contact region and forming diffusion barrier over the first segment of the contact region;

d. defining a second segment of the contact region between the first segment and the isolation structure to electrically isolate the first segment from the isolation structure; and

e. forming a conductive element having a generally horizontal portion over both segments of the contact region, the generally horizontal portion of the conductive element in electrical contact with the first segment of the contact region and electrically isolated from the second segment.

7. A process according to claim 6, further comprising the steps of:

a. providing a first conductivity type substrate; and

b. doping the first segment to a second conductivity type opposite the first conductivity type.

8. A process for making a semiconductor device having a junction between a polysilicon conductor and a substrate, the process comprising the steps of:

a. forming on the substrate an active area at least partially bounded by an isolation structure;

b. defining a contact region in the active area along a surface of the substrate adjacent to the isolation structure;

c. defining a first segment of the contact region and forming diffusion barrier over the first segment of the contact region;

d. defining a second segment of the contact region between the first segment and the isolation structure to electrically isolate the first segment from the isolation structure; and

e. forming a polysilicon conductor having a generally horizontal portion over both segments of the contact region, the generally horizontal portion of the polysilicon conductor in electrical contact with the first segment of the contact region and electrically isolated from the second segment.

9. A process according to claim 8, further comprising forming a diffusion barrier between the polysilicon conductor and the first segment of the contact region.

10. A process according to claim 8, further comprising forming insulating material between the polysilicon conductor and the second segment of the contact region.