Thin film transistor with silicon oxynitride film and silicon nitride channel passivation film for preventing a back channel effect and a method for fabricating the same

• US 6,271,540 B1
• Filed: 04/29/1999
• Issued: 08/07/2001
• Est. Priority Date: 05/01/1998
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Miyamoto, Takashi, Tsujimura, Takatoshi
• Primary Examiner(s): Abraham, Fetsum
• Application Number:
  US09/301,933
• Time in Patent Office: 831 Days
• Field of Search: 438/158, 438/159, 257/72, 257/59, 257/347
• US Class Current: 257/59
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate

Abstract

The present invention provides a thin film transistor (TFT) and a fabrication method thereof which suppresses the back channel effects in which a leakage current flows between a source electrode and a drain electrode at times during a turn off state of the TFT. A thin silicon oxynitride film 90 having a thickness preferably equal to or less than 50 Å is formed between an amorphous silicon layer 40 and a channel passivation film 50 (a silicon nitride film) above a back channel region 100 between a source electrode and a drain electrode of an inverted staggered type TFT to cause Si—O bonds to exist in an upper interface of the amorphous silicon layer. The Si—O bonds increase the Density of States in the back channel region and has an effect for suppressing the leakage current through the back channel region 100 at times during the turn off of the TFT.

Claims

1. A thin film transistor having a gate electrode, a gate insulating film, a silicon layer and source and drain electrodes formed on an insulating substrate in this order comprising:

a silicon oxynitride film formed on said silicon layer on a back channel region between said source electrode and said drain electrode; and

a channel passivation film formed on said silicon oxynitride film wherein said channel passivation film is a silicon nitride film.

2. A thin film transistor according to claim 1, wherein said silicon layer is an amorphous silicon layer.

3. A thin film transistor according to claim 1, wherein said silicon nitride film is sufficiently thicker than said silicon oxynitride film.

4. A thin film transistor according to claim 3, wherein a thickness of said silicon nitride film is about 500 Å

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5. A thin film transistor according to claim 4, wherein a thickness of said silicon oxynitride film is equal to or less than 50 Å

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6. A thin film transistor according to claim 3, wherein a thickness of said silicon oxynitride film is equal to or less than 50 Å

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7. A thin film transistor according to claim 6, wherein a thickness of said silicon oxynitride film is about 25 Å

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8. A thin film transistor according to claim 1, wherein said insulating substrate is glass.