Synchronous rectifier and method of operation

• US 6,271,712 B1
• Filed: 04/07/1999
• Issued: 08/07/2001
• Est. Priority Date: 04/07/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Ball, Alan Richard
• Primary Examiner(s): Cunningham, Terry D.
• Assistant Examiner(s): NGUYEN, LONG T
• Application Number:
  US09/287,279
• Time in Patent Office: 853 Days
• Field of Search: 327/309, 327/343, 327/102, 327/104, 327/531, 327/558, 327/551, 327/176, 327/546, 327/310, 327/318, 327/321, 323/283-285, 323/287, 363/127, 363/89, 330/258
• US Class Current: 327/531
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A synchronous rectifier circuit (10) includes a polarity comparator (14) that generates a signal to a driver circuit (16) for controlling the voltage at the gate of a power MOSFET (60). The power MOSFET (60) is switched to operate in the conduction mode and short out a parasitic diode (62) when the diode is forward biased. The power MOSFET (60) is switched to operate in the nonconduction mode when the parasitic diode (62) is reverse biased. A bias supply circuit (12) uses a capacitor (70) to generate a regulated internal bias that provides power to the polarity comparator (14) and to the driver circuit (16). The internal bias allows the power MOSFET (60) to provide a current conduction that is substantially isolated from the changes in voltage levels at the terminals (64, 66) of the synchronous rectifier circuit (10).

Claims

1. A synchronous rectifier coupled to receive an input signal and providing a charge signal to maintain an operating signal at a predetermined level, the synchronous rectifier comprising:

a bias generator including,

(a) a first comparator having a first input coupled to receive the operating signal, a second input coupled to receive a reference signal indicative of the predetermined level, a power supply input coupled to receive the operating signal, and an output coupled to provide a charge control signal when the operating signal is below the predetermined level; and

(b) a current switch having a control input coupled to receive the charge control signal and an output coupled to provide the charge signal in response to the charge control signal when the input signal is above the operating signal; and

a polarity detection circuit having a power supply input coupled to receive the operating signal, an input coupled to receive the input signal and an output coupled to provide a drive signal in response to a polarity of the input signal.

2. The synchronous rectifier of claim 1 wherein the current switch comprises:

a current mirror having a first terminal coupled to receive the input signal and a second terminal coupled to provide a bias signal;

a first transistor having a control terminal coupled to receive the bias signal and a conduction terminal coupled to provide the charge signal when the input signal is above the predetermined level; and

a second transistor having a conduction terminal coupled to receive the bias signal and a control terminal coupled to receive the charge control signal when the operating signal is above the predetermined level to remove the charge signal.

3. The synchronous rectifier of claim 1 wherein the polarity detection circuit comprises:

a second comparator having a power supply input coupled to receive the operating signal, a first input coupled to receive the input signal and an output coupled to provide a signal indicative of the polarity of the input signal; and

a buffer having an input coupled to receive the output of the comparator and coupled to provide the drive signal.

4. A synchronous rectification circuit coupled to maintain a substantially constant output signal at a predetermined level in response to an input signal operating at first and second polarities, the synchronous rectification circuit comprising:

a charging circuit including,

(a) a first comparator having a first input coupled to receive a reference signal indicative of the predetermined level, a second input coupled to receive the output signal, a power supply input coupled to receive the output signal and an output coupled to provide a control signal; and

(b) a current switch having a control terminal coupled to receive the control signal, a first conduction terminal coupled to receive the input signal and a second conduction terminal coupled to provide a charging signal when the input signal is at the first polarity; and

a polarity detection circuit coupled to receive the input signal and coupled to provide a signal indicative of the polarity of the input signal.

5. The synchronous rectification circuit of claim 4 wherein the current switch comprises:

a current mirror having a first terminal coupled to receive the input signal and a second terminal coupled to provide a bias signal;

a first transistor having a control terminal coupled to receive the bias signal and coupled to provide the charging signal when the input signal is above the predetermined level; and

a second transistor having a conduction terminal coupled to receive the bias signal and a control terminal coupled to receive the control signal when the output signal is above the predetermined level to remove the charging signal.

6. The synchronous rectification circuit of claim 4 wherein the polarity detection circuit comprises a second comparator having a power supply input coupled to receive the output signal, a first input coupled to receive the input signal and an output coupled to provide the signal indicative of the polarity of the input signal.

7. In an integrated circuit, a synchronous rectifier receiving an input signal at first and second pins of the integrated circuit and providing a charging signal at a third pin of the integrated circuit to maintain an output signal at a predetermined level, the synchronous rectifier comprising:

a bias supply circuit including,

(a) a first comparator coupled to receive the output signal and a reference signal indicative of the predetermined level having a power supply input coupled to receive the output signal and having an output coupled to provide a charging control signal when the output signal is below the predetermined level; and

(b) a current switch having a control terminal coupled to receive the charging control signal, a first conduction terminal coupled to receive the input signal and a second conduction terminal coupled to provide the charging signal; and

a conduction control circuit coupled to the first and second pins receiving the input signal at a first polarity and blocking the input signal at a second polarity.

8. The synchronous rectifier of claim 7 wherein the current switch comprises:

a current mirror having a first terminal coupled to receive the input signal and a second terminal coupled to provide a bias signal;

a first transistor having a control terminal coupled to receive the bias signal and coupled to provide the charging signal when the input signal is above the predetermined level; and

a second transistor having a conduction terminal coupled to receive the bias signal and a control terminal coupled to receive the control signal when the output signal is above the predetermined level.

9. The synchronous rectifier of claim 7 wherein the conduction control circuit comprises;

a second comparator having a power supply input coupled to receive the output signal and a first input coupled to receive the input signal; and

a switch having a first conduction terminal coupled to the first pin, a second conduction terminal coupled to the second pin and a control terminal coupled to receive an output of the comparator wherein the switch is open in response to the first polarity and closed in response to the second polarity.

10. The synchronous rectifier of claim 9 wherein the switch includes a transistor.

11. A method of operating a synchronous rectification circuit to maintain a predetermined output signal level in response to an alternating input signal at first and second polarities, the method comprising:

using a current switch to provide a charging signal in response to the first polarity;

using a comparator to regulate the charging signal to maintain the predetermined output signal level substantially independent of an input signal level, wherein the comparator is coupled to receive the predetermined output signal at a power supply input; and

providing a control signal to limit the alternating input signal to a first level in response to the second polarity.

12. The method of claim 11 wherein providing the charging signal compromises activating the current switch when an output signal is below the predetermined output signal level.

13. The method of claim 11 wherein regulating the charging signal comprises:

comparing the output signal to the predetermined output signal level;

providing the charging signal when the output signal is below the predetermined output signal level; and

blocking the charging signal when the output signal is above the predetermined output signal level.

14. A method of operating a synchronous rectifier to maintain a substantially constant output signal substantially independent of an alternating input signal, comprising:

receiving the alternating input signal at first and second polarities;

using a comparator to provide a control signal when the output signal is less than a predetermined level, wherein the comparator is coupled to receive the output signal at a power supply input;

using a current switch to provide a charging signal in response to the control signal during the first polarity of the input signal; and

clamping the second polarity of the input signal to a first level.

15. The method of claim 14 wherein providing the charging signal comprises:

producing the charging signal during the first polarity of the input signal;

comparing the output signal to the predetermined level; and

supplying the charging signal to a charging node when the output signal is below the predetermined level.