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Multiprocessing system employing pending tags to maintain cache coherence

  • US 6,272,602 B1
  • Filed: 03/08/1999
  • Issued: 08/07/2001
  • Est. Priority Date: 03/08/1999
  • Status: Expired due to Term
First Claim
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1. A processing node for connection to a transaction bus in a multiprocessor system, said processing node comprising:

  • a transaction pipeline having an input to receive transactions from said transaction bus;

    a processor core coupled to receive said transactions output from said transaction pipeline;

    a cache memory for storing a plurality of data lines, wherein said cache memory is coupled to said processor core;

    a tag array for storing a plurality of tags each comprising address information and a coherence state for one of said plurality of data lines in said cache memory;

    a cache controller coupled to said processor core, to said transaction bus, to said cache memory, and to said tag array, wherein said cache controller is configured to manage access to said cache memory and to update said tag array;

    a pending tag storage unit coupled to said cache controller and configured to store a plurality of pending tags each indicative of a coherence state for a data line corresponding to a pending transaction within said transaction pipeline, wherein said pending tag storage unit includes a total amount of storage which is less than an amount required to store said plurality of tags contained in said tag array.

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