×

Method and apparatus for executing multiple instruction streams in a digital processor with multiple data paths

  • US 6,272,616 B1
  • Filed: 06/17/1998
  • Issued: 08/07/2001
  • Est. Priority Date: 06/17/1998
  • Status: Expired due to Term
First Claim
Patent Images

1. An integrated circuit having a single digital processor for switching between different modes of operation, said single digital processor comprising:

  • a first instruction pipeline comprising a first fetch stage, a first decoder stage, and a first execute stage, for processing data responsive to an instruction stream;

    a second instruction pipeline comprising a second fetch stage, a second decoder stage, and a second execute stage, for processing data responsive to an instruction stream; and

    a controller, responsive to a first instruction in an instruction stream being processed in said first instruction pipeline, for activating at least a portion of said second instruction pipeline in a first mode in which said second decoder stage and said second execute stage operate upon instructions retrieved by said first fetch stage while said first decoder stage and said first execute stage also operate upon said instructions retrieved by said first fetch stage, wherein said second fetch stage is deactivated when said single digital processor is in said first mode.

View all claims
  • 10 Assignments
Timeline View
Assignment View
    ×
    ×