Integrated process for copper via filling

• US 6,274,008 B1
• Filed: 10/02/2000
• Issued: 08/14/2001
• Est. Priority Date: 01/21/2000
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Dixit, Girish, Wang, Wei D., Xu, Zheng, Fu, Jianming, Gopalraja, Praburam, Chen, Fusen, Sinha, Ashok K., Athreya, Sankaram
• Primary Examiner(s): Huff, Mark F.
• Assistant Examiner(s): CHACKO DAVIS, DABORAH
• Application Number:
  US09/677,946
• Time in Patent Office: 316 Days
• Field of Search: 204/192-5-1, 204/192.12, 438/687, 205/205-215, 427/588
• US Class Current: 204/192.17
• CPC Class Codes: C23C 14/35 by application of a magnetic field, e.g. magnetron sputtering C23C14/3457 takes precedence
• CPC Class Codes: H01J 37/3405 Magnetron sputtering
• CPC Class Codes: H01J 37/342 Hollow targets
• CPC Class Codes: H01J 37/3423 Shape
• CPC Class Codes: H01J 37/3455 Movable magnets
• CPC Class Codes: H01J 37/3458 Electromagnets in particular for cathodic sputtering apparatus electromagnets in general H01F7/06
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76844 Bottomless liners
• CPC Class Codes: H01L 21/76862 Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
• CPC Class Codes: H01L 21/76865 Selective removal of parts of the layer H01L21/76844 takes precedence
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 2221/1089 Stacks of seed layers

Abstract

A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.

Claims

1. A sputtering process for sputtering copper onto a silicon wafer, comprising the steps of:

placing said wafer into a plasma sputter reactor having a copper target;

a first step of sputter depositing copper with a first level of DC power applied to said target and with said sputter reactor being maintained at a first pressure; and

a second step of sputter depositing copper with a second level of DC power less than said first level of DC power applied to said target and said chamber being maintained at a second pressure higher than said first pressure.

2. The process of claim 1, wherein said first pressure is less than 0.7 milliTorr and said second pressure is greater than 1.5 milliTorr.

3. An integrated copper fill process, comprising the steps of:

providing a substrate having a copper feature at a surface in a first dielectric layer, a second dielectric layer formed over said first dielectric layer, a hole formed through said second dielectric layer, and a barrier layer coated onto a bottom and sidewalls of said hole;

a first step of sputtering copper into said hole with a first fraction of copper ionization;

then a second step of sputtering copper into said hole with a second fractions of copper ionization less than said first fraction; and

then electrochemically depositing copper into said hole.

4. The process of claim 3, wherein said first step removes said barrier layer from said bottom of said hole.

5. The process of claim 4, wherein said first step additionally cleans an exposed surface of said copper feature.

6. The process of claim 3, wherein said first and second steps are performed in a same sputtering chamber having a copper target, said first step includes applying a first level of DC power to said target, and said second step includes a second level of Dc power less than said first level of Dc power to said target.

7. The process of claim 3, wherein no cleaning step is performed between a step of depositing said barrier layer and said first step of sputtering copper.

8. The process of claim 3, wherein said hole has an aspect ratio of at least 3:

1.

9. The process of claim 4, wherein during said first step a first level of DC power is applied to a target comprising copper and wherein during said second step a second level of DC power less than said first level of DC power is applied to said target.

10. An integrated copper fill process, comprising the steps of:

providing a substrate having a copper feature at a surface in a first dielectric layer, a second dielectric layer formed over said first dielectric layer, a hole formed through said second dielectric layer, and a barrier layer is coated onto a bottom and sidewalls of said hole;

removing said barrier layer from said bottom of said hole, wherein said removing is performed in a chamber adapted for plasma sputtering of a metal target;

depositing a copper layer onto said sidewalls over said barrier layer and onto said bottom of said hole; and

then electrochemically depositing copper into said hole.

11. The process of claim 10, wherein said chamber is configured to coat said substrate with copper sputtered from a target.

12. The process of claim 10, wherein said copper layer is deposited by plasma sputtering performed in said chamber.

13. The process of claim 10, wherein said providing step includes depositing said barrier layer by a process comprising chemical vapor deposition.

14. The process of claim 10, wherein said hole has an aspect ratio of at least 3:

1.

15. An integrated copper fill process, comprising the steps of:

providing a substrate having a copper feature at a surface in a first dielectric layer, a second dielectric layer formed over said first dielectric layer, a hole formed through said second dielectric layer, and a barrier layer coated on a bottom and sidewalls of said hole;

a first step of removing at least a portion of said barrier layer coated on said bottom of said hole which is performed in a sputtering reactor having a copper target; and

a second step performed in said sputtering reactor of depositing a copper seed layer on said bottom and said sidewalls of said hole.

16. The process of claim 15, further comprising a subsequent step of electrochemically depositing copper into said hole.

17. The process of claim 15, wherein said first step additionally deposits copper on said sidewalls of said hole.

18. The process of claim 15, wherein said first step etches through said barrier layer at said bottom of said hole and cleans an exposed surface of said copper feature.

19. The process of claim 15, wherein said barrier layer comprises a metal layer overlain with a metal nitride layer and wherein said first step removes said metal nitride layer but leaves at least a portion of said metal layer at said bottom of said hole.