Thin film transistor and fabricating method thereof an insulating layer having a pattern not being in contact with source or drain electrode
First Claim
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1. A thin film transistor comprising:
- a substrate;
a source electrode and a drain electrode on the substrate;
a first insulating layer on the substrate, the first insulating layer having a predetermined pattern such that the first insulating layer is not in contact with either the source electrode or the drain electrode;
an active layer on the first insulating layer, the active layer having a source region, a channel region and a drain region;
a second insulating layer covering the active layer;
a gate electrode on the second insulating layer over the channel region;
a third insulating layer covering the gate electrode and an exposed surface of the substrate;
contact holes exposing the source and drain electrodes and the source and drain regions;
a first interconnection wire connecting the source electrode to the source region; and
a second interconnection wire connecting the drain electrode to the drain region, wherein the contact holes are substantially the same height.
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Abstract
The present invention relates to a thin film transistor and a fabricating method thereof which is applied to a buried bus coplanar type TFT wherein the source and drain wires are located on a substrate. The present invention includes an insulated substrate, a source electrode and a drain electrode on the insulated substrate, a first insulating layer on the insulated substrate wherein the first insulating layer has a predetermined pattern, an active layer on the first insulating layer wherein the active layer has a source region, a channel region and a drain region, a second insulating layer covering the active layer, and a gate electrode on the second insulating layer over the channel region.
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Citations
17 Claims
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1. A thin film transistor comprising:
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a substrate;
a source electrode and a drain electrode on the substrate;
a first insulating layer on the substrate, the first insulating layer having a predetermined pattern such that the first insulating layer is not in contact with either the source electrode or the drain electrode;
an active layer on the first insulating layer, the active layer having a source region, a channel region and a drain region;
a second insulating layer covering the active layer;
a gate electrode on the second insulating layer over the channel region;
a third insulating layer covering the gate electrode and an exposed surface of the substrate;
contact holes exposing the source and drain electrodes and the source and drain regions;
a first interconnection wire connecting the source electrode to the source region; and
a second interconnection wire connecting the drain electrode to the drain region, wherein the contact holes are substantially the same height. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 17)
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12. A liquid crystal display comprising:
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a substrate;
a data line on the substrate, the data line having a source electrode;
a first insulating layer on the substrate, the first insulating layer having a predetermined pattern such that a first portion is formed, the first portion not being in contact with other portions of the first insulating layer, the first portion not being in contact with the source electrode;
an active layer on the first insulating layer, the active layer having a source region, a channel region and a drain region;
a second insulating layer covering an exposed surface of the substrate including the active layer and the data line;
a gate line on the second insulating layer over the channel region, the gate line and the data line crossing each other, the gate line having a gate electrode;
a third insulating layer on an exposed surface of the substrate including the gate line;
contact holes exposing the source electrode, the source region and the drain region;
an interconnection wire connecting the source electrode to the source region; and
a pixel electrode connected to the drain region, wherein the contact holes are substantially the same height. - View Dependent Claims (13, 14, 15, 16)
a first capacitor electrode on the second insulating layer over the first insulating layer, the first capacitor in parallel with the gate line;
a second capacitor electrode comprised of a part of the pixel electrode overlapped with the first capacitor electrode; and
a capacitor insulating layer comprised of a part of the third insulating layer between the first and second capacitor electrodes.
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16. The liquid crystal display according to claim 14, wherein an insertion layer made of substance for forming the active layer is inserted between the data line and the first capacitor electrode and at a section where the data line and the first capacitor electrode cross each other.
Specification
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Current AssigneeLG Display Co., Ltd.
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Original AssigneeLG Philips LCD Company Limited (LG Display Co., Ltd.)
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InventorsHa, Yong Min
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Primary Examiner(s)Parker, Kenneth
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Assistant Examiner(s)Qi, Mike
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Application NumberUS09/705,713Time in Patent Office281 DaysField of Search349/42, 349/43, 349/41, 349/47, 257/59, 257/72, 438/30, 438/164, 438/299US Class Current349/42CPC Class CodesH01L 27/124 with a particular compositi...
