Method and apparatus for upgrading firmware boot and main codes in a programmable memory
First Claim
1. A system for providing new boot code for a processor comprising:
- a. a writable non-volatile memory comprising;
i. one region having active non-write protected boot code therein, said boot code having the functionality to allow an instrument containing said memory to communicate with a process control system; and
ii. another region having therein an inactive non-write protected boot code which is a functional equivalent of said active boot code;
b. a source of said new boot code; and
c. means including said processor and under control of said active boot code for replacing said inactive boot code with said new boot code from said source.
3 Assignments
0 Petitions
Accused Products
Abstract
A system for loading upgraded, that is, new boot code and/or main firm ware has a programmable memory that has two boot code regions. One of the regions holds the active boot code while the other region holds the inactive boot code. During a boot code upgrade, the boot code in the inactive region, is under control of the boot code in the active region, replaced with the new boot code. Once the replacement process is verified as having been successful and the vector table in the new boot code is copied to the processor vector table in the memory, the processor can be reset so that the new boot code becomes the active boot code and the previously active boot code becomes the inactive boot code.
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Citations
34 Claims
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1. A system for providing new boot code for a processor comprising:
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a. a writable non-volatile memory comprising;
i. one region having active non-write protected boot code therein, said boot code having the functionality to allow an instrument containing said memory to communicate with a process control system; and
ii. another region having therein an inactive non-write protected boot code which is a functional equivalent of said active boot code;
b. a source of said new boot code; and
c. means including said processor and under control of said active boot code for replacing said inactive boot code with said new boot code from said source. - View Dependent Claims (2)
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3. A system for providing new boot code for a processor comprising:
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a. a writable non-volatile memory comprising;
i. one region having non-write protected active boot code therein, said boot code having the functionality to allow an instrument containing said memory to communicate with a process control system; and
ii. another region having therein an inactive non-write protected boot code which is a functional equivalent of said active boot code; and
b. a source of said new boot code connected to said processor;
said processor operating under control of said active boot code for replacing said inactive boot code with said new boot code from said source. - View Dependent Claims (4)
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5. A method of providing new boot code for a processor, comprising the steps of:
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a. providing a writable non-volatile memory having one region having active non-write protected boot code for said processor therein, said boot code having the functionality to allow an instrument containing said memory to communicate with a process control system and another region having therein an inactive non-write protected boot code which is a functional equivalent of said active boot code;
b. connecting a source of new boot code to said processor;
c. transmitting said new boot code from said source to said processor; and
d. writing under control of said active boot code said new boot code to said another region to thereby replace said inactive boot code. - View Dependent Claims (6, 7, 8)
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9. In a device having a processor a method of providing new boot code for said processor, comprising the steps of:
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a. providing in said device a writable non-volatile memory having one region having active non-write protected boot code for said processor therein, said boot code having the functionality to allow an instrument containing said memory to communicate with a process control system and another region having therein an inactive non-write protected boot code which is a functional equivalent of said active boot code;
b. connecting a source of new boot code to said processor;
c. transmitting said new boot code from said source to said processor; and
d. writing under control of said active boot code said new boot code to said another region to thereby replace said inactive boot code. - View Dependent Claims (10, 11, 12, 13)
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14. A system for providing new boot code for a processor in a device, comprising:
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a. a writable non-volatile memory in said device, said memory comprising;
i. one region having active non-write protected boot code therein, said boot code having the functionality to allow an instrument containing said memory to communicate with a process control system; and
ii. another region having therein an inactive non-write protected boot code which is a functional equivalent of said active boot code;
b. means for connecting a source of said new boot code to said device; and
c. means including said processor and under control of said active boot code for replacing said inactive boot code with said new boot code from said source. - View Dependent Claims (15, 16, 17)
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18. A method for upgrading the boot code in an instrument having a non-volatile memory having a first boot code block having a vector table and a boot code area therein, and a second boot code block having a vector table and a boot code area therein, each of said first and said second boot code areas having non-write protected boot code therein, said method comprising the steps of:
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(a) determining from a processor vector table stored in said non-volatile memory which of said first and said second boot code blocks is then currently active, said boot code in said first boot code area having the functionality to allow said instrument to communicate with a process control system;
(b) writing said upgraded boot code and an associated vector table into said boot code area and vector table area, respectively, of that one of said first and said second boot code blocks which is not then currently active;
(c) determining the successful transfer of said upgraded boot code and said associated vector table to that one of said first and said second boot code blocks which is not then currently active;
(d) causing said then currently active boot code to overwrite said processor vector table with said vector table associated with said upgraded boot code; and
(e) resetting said instrument upon verification that said overwriting of said processor vector table has occurred so that said upgraded boot code becomes the currently active boot code for said instrument after resetting has occurred. - View Dependent Claims (19, 20, 21)
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22. A method for upgrading the boot code in an instrument having a non-volatile memory having a first boot code block having a vector table and a boot code area with currently active non-write protected boot code therein, and a second boot code block having a vector table and a boot code area with currently inactive non-write protected boot code therein, said currently active boot code having the functionality to allow said instrument to communicate with a process control system, said method comprising the steps of:
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(a) writing said upgraded boot code and an associated vector table into said boot code area and vector table area, respectively, of said second boot code block;
(b) determining the successful transfer of said upgraded boot code and said associated vector table to said second boot code block;
(c) causing said then active boot code to overwrite a processor vector table stored in said memory with said associated upgraded vector table; and
(d) resetting said instrument upon verification that said overwriting of said processor vector table has occurred to thereby make the upgraded boot code said active boot code for said instrument after said resetting has occurred. - View Dependent Claims (23, 24, 25)
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26. A method for operating an instrument having a non-volatile memory, said memory having a first boot code block having a vector table and a boot code area with currently active non-write protected boot code therein, and a second boot code block having a vector table and a boot code area with currently inactive non-write protected boot code therein, said method comprising the steps of:
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(a) using said currently active boot code to operate said instrument, said currently active boot code having the functionality to allow said instrument to communicate with a process control system; and
(b) upgrading said currently inactive boot code comprising the steps of;
(i) writing said upgraded boot code and an associated vector table into said boot code area and vector table area, respectively, of said second boot code block;
(ii) determining the successful transfer of said upgraded boot code and said associated vector table to said second boot code block;
(iii) causing said active boot code to overwrite a processor vector table stored in said memory with said associated upgraded vector table; and
(iv) resetting said instrument upon verification that said overwriting of said processor vector table has occurred to thereby make said upgraded boot code the active boot code for said instrument after said resetting has occurred. - View Dependent Claims (27, 28, 29, 30)
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31. A system for upgrading boot code in a nonvolatile memory of an instrument comprising:
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(a) a processing device having said upgraded boot code, said instrument connected to said processing device for receiving said upgraded boot code from said processing device;
said instrument non-volatile memory comprising;
(i) a first boot code block having a vector table and a boot code area with currently active non-write protected boot code therein, said currently active boot code having the functionality to allow said instrument to communicate with a process control system;
(ii) a second boot code block having a vector table and a boot code area with currently inactive non-write protected boot code therein; and
(iii) a processor vector table stored therein;
said processing device causing said instrument to overwrite said currently inactive boot code with said upgraded boot code and said vector table of said second boot code block with a vector table associated with said upgraded boot code, and said currently active boot code to overwrite said processor vector table with said associated upgraded vector table;
said currently active boot code resetting said instrument when said overwriting of said processor vector table has occurred to thereby make said upgraded boot code the active boot code for said instrument after said resetting has occurred. - View Dependent Claims (32)
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33. A method for upgrading boot code in a nonvolatile memory of an instrument, said memory having a first boot code block having a vector table and a boot code area with currently active non-write protected boot code therein, said currently active boot code having the functionality to allow said instrument to communicate with a process control system and a second boot code block having a vector table and a boot code area with currently inactive non-write protected boot code therein, said method comprising the steps of:
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(a) connecting said instrument to a processing device for receiving said upgraded boot code from said processing device;
(b) upgrading said currently inactive boot code, said currently inactive boot code a functional equivalent of said currently active boot code, said upgrading comprising the steps of;
(i) writing said upgraded boot code and an associated vector table into said boot code area and vector table area, respectively, of said second boot code block;
(ii) determining the successful transfer of said upgraded boot code and said associated vector table to said second boot code block;
(iii) causing said active boot code to overwrite a processor vector table stored in said memory with said associated upgraded vector table; and
(iv) resetting said instrument upon verification that said overwriting of said processor vector table has occurred to thereby make said upgraded boot code the active boot code for said instrument after said resetting has occurred. - View Dependent Claims (34)
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Specification