Method of manufacturing isolation trenches using silicon nitride liner

• US 6,277,706 B1
• Filed: 06/08/1998
• Issued: 08/21/2001
• Est. Priority Date: 06/13/1997
• Status: Expired due to Fees

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Ishikawa, Hiraku
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): NGUYEN, HA T
• Application Number:
  US09/093,383
• Time in Patent Office: 1,170 Days
• Field of Search: 438/424, 438/422, 438/423, 438/425-428, 438/435, 438/437, 438/439, 438/438, 438/404, 438/218-221, 438/248, 438/294-297, 438/318, 438/353, 438/355, 438/391
• US Class Current: 438/424
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264

Abstract

In fabrication of a semiconductor device, firstly an isolation trench is formed on a substrate to isolate a plurality of semiconductor elements, and then a thermal oxide film is formed on a sidewall of the trench, whereupon a silicon oxide film is formed on the substrate by chemical vapor deposition. Finally the entire substrate is annealed in a high-pressure ambient.

Claims

1. A method of manufacturing a semiconductor device, comprising the steps in sequence of:

(a) forming on a substrate an isolation trench for isolating a plurality of semiconductor circuit elements;

(b) forming a thermal oxide film on a sidewall of said isolation trench formed in said trench-forming step;

(c) forming a silicon oxide film over the substrate to fill said isolation trench by chemical vapor deposition (CVD);

(d) annealing the entire substrate at a temperature below 1200°

C., in an atmosphere devoid of water vapor, and at an elevated pressure sufficient to cause rearrangement of and densification of the silicon oxide film wherein said silicon oxide film is exposed when annealed; and

(e) leveling the silicon oxide film by chemical and mechanical polishing (CMP) in such a manner that the silicon oxide film remains only in the trench.

2. A method according to claim 1, wherein said annealing is conducted in an atmosphere containing a gas selected from the group consisting of nitrogen, hydrogen, an inert gas and a combination of one or more of said gases.

3. A method according to claim 1, wherein said silicon oxide film comprises an undoped silicon oxide film.

4. A method of manufacturing a semiconductor device, comprising the steps in sequence of:

(a) forming on a substrate a pattern of isolation trenches for isolating a plurality of semiconductor circuit elements;

(b) forming a thermal oxide film on sidewalls of said isolation trenches;

(c) forming silicon nitride film on the substrate;

(d) forming a silicon oxide film over the substrate to fill trenches by chemical vapor deposition (CVD);

(e) annealing the entire substrate at a temperature below 1200°

C., in an atmosphere devoid of water vapor and oxygen, and at an elevated pressure sufficient to cause rearrangement of and densification of the silicon oxide film wherein said silicon oxide film is exposed when annealed; and

(f) leveling the silicon oxide film by chemical and mechanical polishing (CMP) in such a manner that the silicon oxide film remains only in the trenches.

5. A method according to claim 4, wherein said annealing is conducted in an atmosphere containing a gas selected from the group consisting of nitrogen, hydrogen, an inert gas and a combination of one or more of said gases.

6. A method according to claim 4, wherein said silicon nitride film serves as a barrier layer during said chemical and mechanical polishing (CMP) step.

7. A method according to claim 4, further comprising the step of washing the entire substrate with a solution containing fluoric acid, while carrying out said leveling by chemical and mechanical polishing (CMP).

8. A method according to claim 7, wherein after said washing step, the step of removing the silicon nitride film along with the thermal oxide film by wet etching or dry etching using plasma.

9. A method according to claim 4, wherein said silicon oxide film comprises an undoped silicon oxide film.

10. A method of manufacturing a semiconductor device, comprising the steps in sequence of:

(a) forming on a substrate a pattern of isolation trenches for isolating a plurality of semiconductor circuit elements;

(b) forming a thermal oxide film on sidewalls of said isolation trenches;

(c) forming a silicon nitride film on said thermal oxide film formed on said sidewalls of said trenches;

(d) forming silicon oxide film over the substrate to fill said isolation trenches by low pressure chemical vapor deposition (LP-CVD);

(e) annealing the entire substrate at a temperature below 1200°

C., in an atmosphere devoid of water vapor, and at an elevated pressure sufficient to cause rearrangement of the silicon oxide film and thereby densify the silicon oxide film; and

(f) leveling the silicon oxide film by chemical and mechanical polishing (CMP) in such a manner that the silicon oxide film remains only in the trenches.

11. A method according to claim 10, wherein said silicon nitride film is formed to a thickness of approximately 50 to 100 angstroms.

12. A method according to claim 10, wherein said forming of the silicon nitride film includes etching the silicon nitride film with its unetched part covering only the sidewalls of the trenches.

13. A method according to claim 10, further comprising the step of washing the entire substrate with a solution containing fluoric acid after said leveling step.

14. A method according to claim 10, wherein said silicon oxide film comprises an undoped silicon oxide film.