Circuit for partial power-down on dual voltage supply integrated circuits

• US 6,281,724 B1
• Filed: 11/17/1998
• Issued: 08/28/2001
• Est. Priority Date: 11/17/1998
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Ellis, Denis
• Primary Examiner(s): Lam, Tuan T.
• Assistant Examiner(s): NGUYEN, MINH T
• Application Number:
  US09/195,183
• Time in Patent Office: 1,015 Days
• Field of Search: 327/65, 327/143, 327/407, 327/408, 327/530, 327/534, 327/535, 327/537, 327/419-434, 323/271, 307/84-87
• US Class Current: 327/143
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: H03K 17/302 in field-effect transistor switches
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

An integrated circuit chip having formed thereon a voltage control circuit supply adapted to provide one of a pair of voltages selectively in accordance with an operating mode of the circuit. The circuit includes a comparator circuit fed by the pair of voltage sources. A first switch is controlled by the comparator circuit. A first one of the pair of voltage sources is fed through a second switch which may be a transistor or a diode. An input of the first switch is fed to a second one of the pair of voltage sources. The comparator circuit is arranged to place the switch in a non-conducting condition in one operating mode to couple the first one of the pair of voltage sources to the output of the circuit while isolating the second one of the pair of voltage sources supplies from the output of the circuit during such operating mode, and to place the switch in a conducting condition in the other one of the operating modes to de-couple the first one of the pair of voltage sources from the output of the circuit while coupling the second one of the pair of voltage sources to the output of the circuit output during such other one of the operating modes. The standby voltage control circuit allows a higher voltage (e.g., +12 volts) to be power-down while a lower voltage (e.g., +5 volts) is still applied without forward biasing any internal diodes and thus keeping currents low. Such is accomplished by the internal second switch, the comparator, and the switch. In normal operation mode, the second switch is conducting; in power-down operation mode, the second switch is non-conducting the comparator closes the first switch connecting the output of the standby voltage control circuit to the lower voltage.

Claims

1. An integrated circuit chip having formed thereon a voltage control circuit, such circuit comprising:

a comparator circuit adapted for coupling to first and second voltage sources;

a switch electrically coupled to the comparator circuit and the second voltage source and controlled by the comparator circuit; and

a diode electrically coupled between the first voltage source and the switch;

an output of the first voltage source being fed, through the diode, to an output of the switch, an input of the switch being coupled to an a output of the second voltage source;

wherein the comparator circuit, switch and diode are arranged to place the switch in a non-conducting condition and the diode in a conducting condition in a first operating mode to couple the first voltage source to the output of the voltage control circuit through the conducting diode while the non-conducting switch isolates the output of the second voltage source from the output of the voltage control circuit during the first operating mode, and to place the switch in a conducting condition and the diode in a non-conducting condition in a second operating mode, the non-conducting diode de-coupling the output of the first voltage source from the output of the voltage control circuit while the conducting switch couples the output of the second voltage source to the output of the voltage control circuit output during the second operating mode;

wherein the integrated circuit chip includes a substrate having a first type conductivity;

wherein the switch includes a transistor having;

a gate connected to an output of the comparator circuit; and

one of the source/drain regions thereof connected to the voltage of the second voltage source;

wherein source/drain regions of the transistor are formed in a region of the substrate having a type conductivity opposite to the type conductivity of the substrate;

wherein the first voltage source is connected to the substrate through a first voltage contact region having the type conductivity opposite to the conductivity of the substrate;

wherein the diode is a diode formed in the integrated circuit chip;

wherein the diode, during the first operating mode, the diode being a p-n junction between the substrate and the first voltage contact region and with such junction being forward biased conduction, the first operating mode being when the output of the first voltage source is greater than the output of the second voltage source, electrically couples the first voltage source to the substrate to provide the output for voltage control circuit; and

wherein the diode, during the second operating mode, the second operating mode being when the output of the first voltage source falls to ground potential and the output of the second voltage source remains unchanged, and with the p-n junction becoming reversed biased, electrically isolating the second voltage source from the first voltage source;

wherein the switch, during the second operating mode, is placed in a conducting condition.

2. The voltage control circuit recited in claim 1 wherein the transistor is a pMOS device, the substrate being n type conductivity and the source and drain regions of the transistor having p type conductivity.

3. The voltage control circuit recited in claim 1 wherein the comparator has hysteresis.

4. An integrated circuit chip having formed thereon a standby voltage control circuit adapted to provide one of a pair of voltages from first and second voltage sources selectively in accordance with an operating mode of the standby voltage control circuit, such circuit comprising:

a comparator circuit adapted for coupling to the first and second voltage sources;

a switch electrically coupled to the comparator circuit and the second voltage source and controlled by the comparator circuit; and

a diode electrically coupled between the switch and the first voltage source; and

wherein an output from the first voltage source is fed to an output of the switch through the diode and an input of the switch is fed a voltage from the second voltage source;

wherein the comparator circuit, switch and diode are arranged to place the switch in a non-conducting condition and the diode in a conducting condition in a non-standby operating mode to couple the output from the first voltage source to the output of the standby voltage control circuit while isolating the voltage from the second voltage source from the output of the standby voltage control circuit during the non-standby operating mode, and to place the switch in a conducting condition and the diode in a non-conducting condition in a standby operating model to de-couple the output from the first voltage source from the output of the standby voltage control circuit while coupling the output from the second voltage source to the output of the standby voltage control circuit output during the standby operating mode;

wherein the integrated circuit chip includes a substrate having a first type conductivity;

wherein the switch circuit includes a transistor having;

a gate connected to an output of the comparator circuit; and

one of the source/drain regions thereof connected to the second voltage source; and

wherein source/drain regions of the transistor are formed in a region of the substrate having a type conductivity opposite to the type conductivity of the substrate; and

wherein the first voltage source is connected to the substrate through a first voltage contact region having the type conductivity opposite to the conductivity of the substrate;

wherein the diode, during the non-standby operating mode, the diode being a p-n junction between the substrate and the first voltage contact region and with such junction being forward biased conduction, the non-standby operating mode being when the output of the first voltage source is greater than the output of the second voltage source, electrically couples the first voltage source to the substrate to provide the output for the standby voltage control circuit; and

wherein the diode, during the standby operating mode, the standby operating mode being when the output from the first voltage source falls to ground potential and the output of the second voltage source remains unchanged, and with the p-n junction becoming reversed biased, electrically isolates the second voltage source from the first voltage source;

wherein the switch, during the standby operating mode, is placed in a conducting condition.

5. The standby voltage control circuit recited in claim 4 wherein the transistor is a pMOS device, the substrate being n type conductivity and the source and drain regions of the transistor having p type conductivity.

6. The standby voltage control circuit in claim 4 wherein the comparator has hysteresis.

7. An integrated circuit chip having formed thereon a voltage control circuit, such circuit comprising:

a comparator circuit adapted for coupling to first and second voltage sources;

a switch electrically coupled to said comparator circuit and said second voltage source and controlled by said comparator circuit; and

a diode electrically coupled between said first voltage source, an input of said comparator through a voltage divider, and said switch;

an output of said first voltage source being fed, through said diode, to an output of said switch, an input of said switch being coupled to an output of said second voltage source;

said comparator circuit, switch, and diode being arranged to place said switch in a non-conducting condition and said diode in a conducting condition in a first operating mode to couple said first voltage source to the output of the voltage control circuit through the conducting diode while the non-conducting switch isolates the output of said second voltage source from the output of the voltage control circuit during the first operating mode, and to place said switch in a conducting condition and said diode in a non-conducting condition in a second operating mode, the non-conducting diode de-coupling the voltage of the first voltage source from the output of the voltage control circuit while the conducting switch couples the output of the second voltage source to the output of the voltage control circuit output during the second operating mode;

wherein the integrated circuit chip includes a substrate having a first type conductivity;

said switch including a transistor having a gate connected to an output of said comparator circuit and one of the source/drain regions thereof connected to the output of said second voltage source;

said source/drain regions of the transistor being formed in a region of the substrate having a type conductivity opposite to the type conductivity of the substrate;

said first voltage source being connected to the substrate through a first voltage contact region having the type conductivity opposite to the conductivity of the substrate;

said diode being a diode formed in the integrated circuit chip;

said diode, during the first operating mode, said diode being a p-n junction between the substrate and the first voltage contact region and with such junction being forward biased conduction, the first operating mode being when the output of said first voltage source is greater than the output of said second voltage source, electrically coupling said first voltage source to the substrate to provide the output for voltage control circuit; and

said diode, during the second operating mode, the second operating mode being when the output of said first voltage source falls to ground potential and the output of said second voltage source remains unchanged, and with the p-n junction becoming reversed biased, electrically isolating said second voltage source from said first voltage source;

said switch, during the second operating mode, being placed in a conducting condition.

8. The integrated circuit chip as claimed in claim 7, wherein an anode of said diode is connected to the output of the first voltage source and a cathode of said diode is connected to a non-inverting input of said comparator via the voltage divider.