MOSFET single-pair differential amplifier having an adaptive biasing scheme for rail-to-rail input capability

• US 6,281,753 B1
• Filed: 12/13/1999
• Issued: 08/28/2001
• Est. Priority Date: 12/18/1998
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Corsi, Marco, Maclean, Kenneth G., Escobar-Bowser, Priscilla
• Primary Examiner(s): Mottola, Steven J.
• Application Number:
  US09/459,950
• Time in Patent Office: 624 Days
• Field of Search: 330/253, 330/258, 330/261
• US Class Current: 330/261
• CPC Class Codes: H03F 2203/45292 the AAC comprising biasing means controlled by the signal
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/4521 Complementary long tailed pairs having parallel inputs and being supplied in parallel

Abstract

A single pair differential amplifier circuit (90) provides signal amplification across the full amplifier power-supply voltage range. The differential amplifier circuit (90) is coupled to the first rail (122) and the second rail (124) and has a differential input (114 and 116) for receiving a common-mode input voltage. A bias circuit (126) is coupled to the differential amplifier circuit (90) for applying a bias voltage to the differential pair of transistors (102 and 104) such that the bias circuit (126) controls the threshold voltage of the differential pair of transistors (102 and 104) in the response to the common-mode input voltage. The bias circuit (126) turns differential pair of transistors (102 and 104) on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage.

Claims

1. A circuit, comprising:

a first rail for receiving a first supply voltage;

a second rail for receiving a second supply voltage;

a differential amplifier circuit coupled to the first rail and the second rail and having a differential input for receiving a common-mode input voltage, the differential amplifier circuit including a differential pair of transistors;

a bias circuit coupled to said differential amplifier circuit for applying a bias voltage to the differential pair of transistors, the bias circuit controlling the threshold voltage of the differential pair of transistors in the response to the common-mode input voltage to turn the differential pair of transistors on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage wherein the bias circuit provides a first bias voltage to turn the differential pair of transistors on when the common mode input voltage is in a first range extending from the first supply voltage to a first threshold voltage and a second bias voltage to turn the differential pair of transistors on when the common mode input voltage is in the second range extending from second supply voltage to the first threshold voltage.

2. A circuit, comprising:

a first rail for receiving a first supply voltage;

a second rail for receiving a second supply voltage;

a differential amplifier circuit coupled to the first rail and the second rail and having a differential input for receiving a common-mode input voltage, the differential amplifier circuit including a differential pair of transistors;

wherein the differential amplifier circuit comprises;

a pair of like-polarity differentially coupled field effect transistors, the first and second transistor of the pair differentially respond to the input signal by dividing the first tail current between the currents;

a pair of like-polarity common-gate coupled field effect transistors, the third and fourth transistors of the pair provide an active load to the differential means, the pair of like-polarity common-gate coupled field effect transistors are of opposite polarity to the pair of like-polarity differentially coupled field effect transistors; and

a fifth field effect transistor that provides tail current for the pair of like-polarity differentially coupled field effect transistors; and

a bias circuit coupled to said differential amplifier circuit for applying a bias voltage to the differential pair of transistors, the bias circuit controlling the threshold voltage of the differential pair of transistors in the response to the common-mode input voltage to turn the differential pair of transistors on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage.

3. A circuit, comprising:

a first rail for receiving a first supply voltage;

a second rail for receiving a second supply voltage;

a differential amplifier circuit coupled to the first rail and the second rail and having a differential input for receiving a common-mode input voltage, the differential amplifier circuit including a differential pair of transistors;

a bias circuit coupled to said differential amplifier circuit for applying a bias voltage to the differential pair of transistors, the bias circuit controlling the threshold voltage of the differential pair of transistors in the response to the common-mode input voltage to turn the differential pair of transistors on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage,

wherein the biasing circuit comprises;

a replica circuit coupled to the differential amplifier circuit for replicating half of the differential pair of transistors and for applying a voltage across the backgates of the differential pair of transistors to supply a threshold voltage such that when the common-mode voltage V_CM is in the second-end range the differential pair of input transistors is operable; and

a switching circuit coupled to the differential amplifier circuit and the replica circuit to turn the replica circuit on when the input common-mode voltage V_CM is in the second-end range beyond the threshold voltage of the differential pair of transistors and to turn the replica circuitry off when the common-mode voltage V_CM is in the first-end range.

4. The circuit of claim 3, wherein the replica circuit comprises:

a current source;

a sixth field effect transistor coupled in series to the current source, the backgate of the sixth field effect transistor is coupled to the backgate of the pair of like-polarity differentially coupled field effect transistors of the differential amplifier circuit for providing backgate voltage to the pair of like-polarity differentially coupled field effect transistors, the sixth field effect transistor is equivalent in size to either of the pair of like-polarity differentially coupled field effect transistors of the differential amplifier circuit;

an amplifier coupled to the sixth field effect transistor to form a feedback amplifier to modulate the backgate voltage supplied to the pair of like-polarity differentially coupled field effect transistors of the differential amplifier circuit; and

a seventh field effect transistor coupled in series to the sixth field effect transistor to supply current to the replica circuit, the seventh field effect transistor is equivalent to half the size the fifth field effect transistor of the differential amplifier circuit.

5. The circuit of claim 3, wherein the switching circuit comprises:

an eighth field effect transistor coupled in parallel to the sixth and seventh field effect transistors; and

a ninth field effect transistor coupled in series to the amplifier of the replica circuit, the series coupled ninth field effect transistor and amplifier coupled in parallel to the eighth field effect transistor.

6. An electronic circuit operable between first and second supply voltages which constitute a power supply range including a first-end range extending to the first supply voltage and a second-end range extending to the second supply voltage, the circuit comprising:

a differential means having a differential pair of transistors having a first threshold voltage for amplifying a differential input signal when its common-mode voltage V_CM is in the first-end range;

a replica circuitry means coupled to the differential means for replicating half of the differential pair of transistors and for applying a voltage across the backgates of the differential pair of transistors to supply a second threshold voltage such that when the common-mode voltage V_CM is in the second-end range the differential pair of input transistors is operable; and

a switching means coupled to the differential means and the replica circuitry means to turn the replica circuitry means on when the input common-mode voltage V_CM is in the second-end range beyond the first threshold voltage of the differential pair of input transistors and to turn the replica circuitry off when the common-mode voltage V_CM is in the first-end range.

7. The circuit as claimed in claim 6, wherein the differential means comprises

a pair of like-polarity differentially coupled field effect transistors, a first and second transistor of the pair differentially respond to the input signal;

a pair of like-polarity common-gate coupled field effect transistors, a third and fourth transistor of the pair provide an active load to the differential means, the pair of like-polarity common-gate coupled field effect transistors are of opposite polarity to the pair of like-polarity differentially coupled field effect transistors; and

a fifth field effect transistor that provides tail current for the pair of like-polarity differentially coupled field effect transistors.

8. The circuit as claimed in claim 7, wherein the replica circuitry means comprises:

a current source;

a sixth field effect transistor coupled in series to the current source, the backgate of the sixth field effect transistor is coupled to the backgate of the pair of like-polarity differentially coupled field effect transistors of the differential means for providing backgate voltage to the pair of like-polarity differentially coupled field effect transistors, the sixth field effect transistor is equivalent in size to either of the pair of like-polarity differentially coupled field effect transistors of the differential means;

an amplifier coupled to the sixth field effect transistor to form a feedback amplifier to modulate the backgate voltage supplied to the pair of like-polarity differentially coupled field effect transistors of the differential means; and

a seventh field effect transistor coupled in series to the sixth field effect transistor to supply current to the replica circuitry means, the seventh field effect transistor is equivalent to half the size the fifth field effect transistor of the differential means.

9. The circuit as claimed in claim 8, wherein the switching means comprises:

an eighth field effect transistor coupled in parallel to the sixth and seventh field effect transistors; and

a ninth field effect transistor coupled in series to the amplifier of the replica circuitry means, the series coupled ninth field effect transistor and amplifier coupled in parallel to the eighth field effect transistor.

10. The circuit as claimed in claim 9, wherein the first, second, fifth, sixth, seventh, eighth, and ninth field effect transistors are n-channel MOS devices.

11. The circuit as claimed in claim 9, wherein the first, second, fifth, sixth, seventh, eighth, and ninth field effect transistors are p-channel MOS devices.