Surface finishing of SOI substrates using an EPI process

• US 6,287,941 B1
• Filed: 09/20/1999
• Issued: 09/11/2001
• Est. Priority Date: 04/21/1999
• Status: Expired due to Term

• Current Assignee: Silicon Genesis
• Original Assignee: Silicon Genesis
• Inventors: Kang, Sien G., Malik, Igor J.
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): KIELIN, ERIK J
• Application Number:
  US09/399,985
• Time in Patent Office: 722 Days
• Field of Search: 438/479, 438/458, 438/459, 438/967
• US Class Current: 438/459
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: Y10S 438/967 Semiconductor on specified insulator

Abstract

A method for treating a film of material, which can be defined on a substrate, e.g., silicon. The method includes providing a substrate comprising a cleaved surface, which is characterized by a predetermined surface roughness value. The substrate also has a distribution of hydrogen bearing particles defined from the cleaved surface to a region underlying said cleaved surface. The method also includes increasing a temperature of the cleaved surface to greater than about 1,000 Degrees Celsius while maintaining the cleaved surface in an etchant bearing environment to reduce the predetermined surface roughness value by about fifty percent and greater. Preferably, the value can be reduced by about eighty or ninety percent and greater, depending upon the embodiment.

Claims

1. A method for treating a film of material, said method comprising:

providing a substrate comprising a cleaved surface, said cleaved surface being characterized by a predetermined surface roughness value; and

increasing a temperature of said cleaved surface to greater than about 1,000 Degrees Celsius while maintaining said cleaved surface in a hydrogen bearing environment to reduce said predetermined surface roughness value by about fifty percent and greater, wherein said hydrogen bearing environment includes an etchant, said etchant being an HCl gas, and said hydrogen bearing environment including said HCl gas and a hydrogen gas.

2. The method of claim 1 wherein said cleaved surface has an initial concentration level of hydrogen in the range of 10²¹ and 5×

10²² atoms/cm³.

3. The method of claim 1 wherein a ratio of said HCl gas to said hydrogen gas is about 0.001 to 10.

4. The method of claim 1 wherein a ratio of said HCl gas to said hydrogen gas is about 0.001 to 30.

5. The method of claim 1 wherein said predetermined surface roughness value of said cleaved surface is reduced in a thermal processing chamber.

6. The method of claim 1 wherein said cleaved surface is provided by a controlled cleavage process.

7. The method of claim 1 wherein said substrate is a silicon wafer.

8. A method of manufacturing a substrate, comprising:

providing said substrate having a cleaved surface with a particular surface roughness value; and

increasing temperature of said cleaved surface to greater than 1,000 degrees Celsius while exposing said cleaved surface to an etchant to reduce said particular surface roughness value, wherein said etchant is one selected from HCl, HBr, HI, and HF.

9. The method of claim 8, wherein said particular surface roughness value is reduced by more than fifty percent.

10. The method of claim 8, where said etchant contains hydrogen.

11. The method of claim 8 wherein said etchant is HCl, and said cleaved surface is exposed to a hydrogen gas.

12. The method of claim 11 wherein ratio of said HCl gas and said hydrogen gas is about 0.001 to 10.

13. The method of claim 8, further including:

exposing said cleaved surface to a silicon bearing gas to deposit silicon atoms thereon.