Radio receiver

• US 6,289,208 B1
• Filed: 03/29/1999
• Issued: 09/11/2001
• Est. Priority Date: 04/01/1998
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Hareyama, Nobuo
• Primary Examiner(s): Bost, Dwayne
• Assistant Examiner(s): GELIN, JEAN ALLAND
• Application Number:
  US09/281,132
• Time in Patent Office: 897 Days
• Field of Search: 455/257, 455/260, 455/264, 455/195.1, 455/256, 455/265, 455/193.1, 455/193.2, 375/376, 375/375, 375/371, 375/316, 331/27, 331/1.A, 327/76.23, 327/76.24
• US Class Current: 455/260
• CPC Class Codes: H03J 1/005 in a loop
• CPC Class Codes: H03J 7/065 the counter or frequency divider being used in a phase locked loop
• CPC Class Codes: H03L 2207/08 Modifications of the phase-locked loop for ensuring constant frequency when the power supply fails or is interrupted, e.g. for saving power
• CPC Class Codes: H03L 7/146 by using digital means for generating the oscillator control signal H03L7/141, H03L7/143 take precedence

Abstract

A frequency synthesizer type receiver requiring small power consumption and maintaining excellent receiving performance. In the frequency synthesizer type receiver, a reception frequency thereof is set based on an oscillatory output of a PLL circuit. When the oscillation frequency of the PLL circuit is stabilized, a control voltage can be supplied to a voltage-controlled oscillator in the PLL circuit from a controller situated outside of the PLL circuit. The tuned state of a reception unit is measured at this time. If a shift in the reception frequency is detected based on the measured value, the control voltage to be supplied to the voltage-controlled oscillator is corrected.

Claims

1. A receiver, comprising:

a phase-locked loop circuit including a voltage-controlled oscillator, a variable frequency divider for frequency-dividing an output of said voltage-controlled oscillator, a reference oscillator, a phase detector for outputting a phase difference signal representing a phase difference between an output of said variable frequency divider and an output of said reference oscillator, and a filter for smoothing an output voltage of said phase detector, with a resultant voltage of said filter used as a control voltage fed to said voltage-controlled oscillator;

a reception unit, tuned to a frequency corresponding to an oscillation frequency of said voltage-controlled oscillator, for receiving a signal having the oscillation frequency of said voltage-controlled oscillator;

control voltage measuring means for measuring the control voltage supplied to said voltage-controlled oscillator and for measuring a voltage of an output signal of said reception unit that corresponds to the tuned frequency of said reception unit; and

control means for producing a signal that has a voltage value measured by said control voltage measuring means and supplying the signal to said voltage-controlled oscillator when the oscillation frequency of said phase-locked loop circuit is stabilized and said phased-locked loop is open, wherein

said control means further controls said control voltage measuring means to measure a center voltage of the output signal from said reception unit for correcting the voltage value of the produced signal according to a frequency shift when a shift in the tuned frequency of said reception unit is detected by comparing the measured center voltage to an initial center voltage measured when said phase-locked loop circuit is first stabilized.