Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit
First Claim
1. A data processor including an emulation controller for causing the data processor to enter an emulation mode, and dedicated registers for use in the emulation mode wherein the emulation controller is responsive to an emulation instruction placed into a user program for causing the data processor to enter emulation mode, and wherein said emulation instruction replaces a pre-existing instruction and the instruction replaced by the emulation instruction is held in a dedicated register such that it can be executed upon return from the emulation mode.
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Accused Products
Abstract
A data processor is provided with an embedded debugger. The debugging function is provided by the execution of a debugging program which is stored in reserved, non-volatile memory which is internal to the data processor. During the debug mode, the data processor allows the internal registers used during execution of a user program to be examined. Debug operation can be initiated via debug instruction which replaces an existing instruction in the user code, the replaced instruction being held in a special purpose register such that it can be executed on return from the debug mode. Single step operation of the data processor can be performed in debug mode and data and instructions can be exchanged with the data processor in debug mode, optionally via a single pin so as not to sacrifice any user resources.
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Citations
54 Claims
- 1. A data processor including an emulation controller for causing the data processor to enter an emulation mode, and dedicated registers for use in the emulation mode wherein the emulation controller is responsive to an emulation instruction placed into a user program for causing the data processor to enter emulation mode, and wherein said emulation instruction replaces a pre-existing instruction and the instruction replaced by the emulation instruction is held in a dedicated register such that it can be executed upon return from the emulation mode.
- 26. A data processor including an emulation controller for causing the data processor to enter an emulation mode, wherein the emulation controller is responsive to an emulation break point instruction overwriting an instruction of a user program resident in program memory.
- 33. An integrated circuit comprising a data processor operable in a first mode to execute a user'"'"'s program and in a second mode to debug the user'"'"'s program and in which the data processor executes code stored in an emulation memory when the data processor is operating in the second mode.
- 36. A data processor operable in a first mode to execute user code stored in a non-volatile user code memory and in a second mode to execute code stored in an internal reserved memory, wherein the user code is re-programmable while the data processor is in the second mode and in the second mode, the data processor acts to allow the user code to be debugged.
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43. A method of reprogramming an integrated circuit containing a data processor, a first memory region for containing a user'"'"'s code and a second, internal memory region for containing an emulation code, and wherein the data processor is operable in a first mode to execute code from the first memory, and in a second mode to execute emulation code from the second memory, which emulation code instructs the data processor to obtain new code to modify the user'"'"'s code and allow the user code to be debugged.
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44. A data processor operable in a first mode to execute the user code from an integrated memory, and in a second mode to execute debug code stored in an integrated non-volatile reserved memory;
- in which in the second mode the data processor executes instructions to communicate its internal status to an external development system and receive data and command information from the development system, where said communication is bi-directional via only a single terminal.
- View Dependent Claims (45, 46, 47, 48, 49, 50, 51, 52, 53)
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54. A method of debugging a data processor wherein the data processor is operable in a first mode to execute user code from an integrated memory, and in a second mode to execute debug code stored in reserved integrated memory;
- and in which in the second mode the data processor executes instructions to communicate its internal status to an external development system, and receive data and command information from the development system, where said communication is bi-directional via only a single terminal.
Specification