Zirconium and/or hafnium silicon-oxynitride gate dielectric

• US 6,291,867 B1
• Filed: 11/04/1999
• Issued: 09/18/2001
• Est. Priority Date: 07/24/1997
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Wallace, Robert M., Stoltz, Richard A., Wilk, Glen D.
• Primary Examiner(s): Whitehead, Jr., Carl
• Assistant Examiner(s): Brophy, Jamie L.
• Application Number:
  US09/434,205
• Time in Patent Office: 684 Days
• Field of Search: 257/310, 257/324, 257/368, 257/410, 257/411
• US Class Current: 257/410
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02189 the material containing zirconium, e.g. ZrO2
• CPC Class Codes: H01L 21/02194 the material containing more than one metal element
• CPC Class Codes: H01L 21/02249 formation by combined oxidation and nitridation performed simultaneously
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/28229 by deposition of a layer, e.g. metal, metal compound or poysilicon, followed by transformation thereof into an insulating layer
• CPC Class Codes: H01L 21/3143 composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31641 Deposition of Zirconium oxides, e.g. ZrO2
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 21/31691 with perovskite structure
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium silicon-oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium silicon-oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide. However, the zirconium silicon-oxynitride gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability.

Claims

1. An integrated circuit having a field effect device fabricated thereon, the field effect device comprising:

a single-crystal silicon semiconducting channel region;

a metal silicon-oxynitride gate dielectric overlying the channel region

where the metal is selected from the group of hafnium, zirconium, and mixtures thereof; and

a conductive gate overlying the gate dielectric.

2. The integrated circuit of claim 1, wherein the gate dielectric is polycrystalline.

3. The integrated circuit of claim 1, wherein the gate dielectric is amorphous.

4. The integrated circuit of claim 1, wherein the metal silicon-oxynitride gate dielectric has a graded composition comprising a relatively greater ratio of silicon to metal near the semiconducting channel region, as compared to the ratio of silicon to metal near the conductive gate.

5. The integrated circuit of claim 1, wherein the single-crystal silicon semiconducting channel region is part of an epitaxial layer.

6. The integrated circuit of claim 1, wherein the single-crystal silicon semiconducting channel region is part of a silicon substrate.

7. The integrated circuit of claim 1, wherein the single-crystal silicon semiconducting channel region is part of a Si (100) substrate.

8. The integrated circuit of claim 1, wherein the conductive gate comprises polysilicon.

9. The integrated circuit of claim 1, wherein the metal is zirconium.

10. The integrated circuit of claim 1, wherein the metal is hafnium.

11. The integrated circuit of claim 4, wherein the single-crystal silicon semiconducting channel region is part of an epitaxial layer.

12. The integrated circuit of claim 4, wherein the single-crystal silicon semiconducting channel region is part of a silicon substrate.

13. The integrated circuit of claim 4, wherein the single-crystal silicon semiconducting channel region is part of a Si (100) substrate.

14. The integrated circuit of claim 4, wherein the conductive gate comprises polysilicon.

15. The integrated circuit of claim 4, wherein the metal is zirconium.

16. The integrated circuit of claim 4, wherein the metal is hafnium.