Method for programming of a semiconductor memory cell
First Claim
1. A method for programming an array having a multiplicity of memory cells, the method comprising the steps of:
- per cell to be programmed, verifying a programmed or non-programmed state of said cell;
flagging those of said cells that verify as non-programmed during one of said verify steps after having previously verified as programmed;
applying a programming pulse having a programming level to said non-programmed cells which are not flagged cells;
repeating said steps of verifying, flagging and applying until all of said cells verify as programmed at least once; and
applying a boost pulse having a boost programming level lower than said programming level to said flagged cells.
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Abstract
A method for programming an array having a multiplicity of memory cells. The method includes, per cell to be programmed, verifying a programmed or non-programmed state of the cell and flagging those of the cells that verify as non-programmed during one of the verify steps after having previously verified as programmed. A programming pulse having a programming level is applied to the non-programmed cells which are not flagged cells. The steps of verifying, flagging and applying are then repeated until all of the cells verify as programmed at least once. Subsequently, a boost pulse having a boost programming level lower than the programming level is applied to the flagged cells.
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Citations
31 Claims
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1. A method for programming an array having a multiplicity of memory cells, the method comprising the steps of:
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per cell to be programmed, verifying a programmed or non-programmed state of said cell;
flagging those of said cells that verify as non-programmed during one of said verify steps after having previously verified as programmed;
applying a programming pulse having a programming level to said non-programmed cells which are not flagged cells;
repeating said steps of verifying, flagging and applying until all of said cells verify as programmed at least once; and
applying a boost pulse having a boost programming level lower than said programming level to said flagged cells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for erasing an array having a multiplicity of memory cells, the method comprising the steps of:
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per cell to be erased, verifying an erased or non-erased state of said cell;
flagging those of said cells that verify as non-erased during one of said verify steps after having previously verified as erased;
applying an erasing pulse having an erasure level to said non-erased cells which are not flagged cells;
repeating said steps of verifying, flagging and applying until all of said cells have verified as said erased at least once; and
applying a boost pulse having a boost erase level lower than said erased level to said flagged cells.- View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A method for programming an array having a multiplicity of memory cells, the method comprising the steps of:
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per cell to be programmed, verifying a coarse programmed or non-programmed state of said cell;
flagging those of said cells that verify as non-programmed during one of said verify steps after having previously verified as programmed;
applying a coarse programming pulse having a coarse programming level to said non-programmed cells which are not flagged cells;
repeating said steps of verifying, flagging and applying until all of said cells verify as programmed at least once;
applying a fine programming pulse to said flagged cells;
verifying a complete programmed state or a complete non-programmed state of said cell; and
repeating the second steps of verifying and applying until all of said cells are very as fully programmed at least once. - View Dependent Claims (26, 27, 28, 29)
verifying if a threshold voltage of said cell is within α
volts of a desired threshold voltage; and
if said verified level is greater than said α
volts, repeating said first steps of verifying, flagging and applying until all of said cells verify with within α
volts of a desired threshold voltage.
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30. A method for an array having a multiplicity of memory cells, the method comprising the steps of:
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per cell to be programmed, verifying a programmed or non-programmed state of said cell;
flagging those of said cells that verify as non-programmed during one of said program verify steps after having previously verified as programmed;
applying a programming pulse having a programming level to said non-programmed cells which are not flagged cells;
applying a recovery pulse having a recovery level lower than said programming level to said flagged cells; and
repeating said steps of verifying, flagging, applying and applying until all of said cells verify as said programmed at least once. - View Dependent Claims (31)
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Specification