Method for preventing deadlock by suspending operation of processors, bridges, and devices
First Claim
1. A method comprising the following steps:
- a) maintaining a multi-bus. multi-processor computer;
b) ascertaining whether a locked cycle of a predetermined type has been requested by a processor and, if so, c) suspending operation of all processors.
2 Assignments
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Accused Products
Abstract
A deadlock-avoidance system for a computer. In a multi-bus, multi-processor computer, one processor may request a lock on a bus, to execute a locked cycle, thereby blocking all other processors, and other agents, from access to the bus. In addition, a conflicting agent may, in effect, lock a resource which is needed by the processor to complete the cycle for which the lock was requested. These two locks can create a deadlock situation which stalls the computer: the processor and the conflicting agent have each locked a resource needed by the other. Under the invention, when a locked cycle is requested by a processor, all other operations are suspended in the computer. Then queues standing in memory controllers are emptied. If a process requested by an agent occupies a resource, such as a bridge, required by the requested locked cycle, that resource is freed. Then the locked cycle is executed.
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Citations
13 Claims
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1. A method comprising the following steps:
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a) maintaining a multi-bus. multi-processor computer;
b) ascertaining whether a locked cycle of a predetermined type has been requested by a processor and, if so, c) suspending operation of all processors. - View Dependent Claims (2, 3, 4, 5, 6, 12, 13)
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7. A method of operating a multi-bus, multi-processor computer, wherein bridges connect busses in the computer with other busses, comprising the following steps:
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a) ascertaining whether a locked cycle of a predetermined type has been requested by a processor and, if so, b) suspending operation of all processors, c) suspending operation of all bridges, in response to the request d) draining queues in memory controllers after suspending operation of the processors;
e) attempting to execute the requested locked cycle after draining the queues; and
f) if the requested locked cycle requires use of a bridge having a non-empty input queue, then i) emptying input queues in all bridges, and then ii) executing the locked cycle with assistance of said bridge.
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8. A method of operating a multi-bus, multi-processor computer, comprising the following steps:
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a) ascertaining whether a locked cycle of a predetermined type has been requested by a processor and, if so, b) suspending operation of all processors and all bridges;
c) after step (b), emptying queues of memory controllers;
d) after step (c), ascertaining i) whether the requested locked cycle will require involvement of a bridge and, if so, ii) whether said bridge is available;
e) after step (d), i) if said bridge is available, executing said requested lock cycle;
ii) if said bridge is not available, emptying the input queue in said bridge, and then executing said requested locked cycle.
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9. In a multi-bus, multi-processor computer, the improvement comprising the following steps:
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a) detecting a request from a requesting processor for a locked cycle which extends beyond a bus lockable by the requesting processor; and
b) in response to the request, suspending operation of all other processors which can interfere with the locked cycle, while the requesting processor executes to the locked cycle. - View Dependent Claims (10)
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11. In a multi-bus, multi-processor computer, the improvement comprising:
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a) means for detecting a request for a locked cycle which requires involvement of a bridge; and
b) means for responding to said request by i) suspending operation of other agents in the computer;
ii) emptying queues in memory controllers; and
iii) if said bridge is occupied, de-occupying said bridge, for use by said locked cycle.
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Specification