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Manufacturing method of interconnection layer for semiconductor device

  • US 6,294,462 B1
  • Filed: 08/04/1998
  • Issued: 09/25/2001
  • Est. Priority Date: 12/22/1997
  • Status: Expired due to Term
First Claim
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1. A method of manufacturing an interconnection layer for a semiconductor device comprising the steps of:

  • forming a conductive pattern near a surface of a semiconductor substrate or on the surface of the semiconductor substrate;

    forming an insulation layer on a surface of the conductive pattern;

    forming cavities in the insulation layer exposing portions of the conductive pattern;

    forming a first barrier layer pattern on a surface of the insulation layer and on sidewalls and bottoms of each of the cavities;

    selectively forming a seed layer directly on and in contact with portions of the first barrier layer pattern formed on the sidewalls and bottoms of the grooves;

    selectively forming a copper interconnection layer on the first barrier layer pattern and the seed layer; and

    forming a second barrier layer on an upper surface and sides of the copper interconnection layer.

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