Circuit(s), architecture and method(s) for operating and/or tuning a ring oscillator

• US 6,294,962 B1
• Filed: 12/09/1998
• Issued: 09/25/2001
• Est. Priority Date: 12/09/1998
• Status: Expired due to Term

• Current Assignee: Hanger Solutions, LLC (IP Investments Group LLC)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Mar, Monte F.
• Primary Examiner(s): KINKEAD, ARNOLD M
• Application Number:
  US09/207,912
• Time in Patent Office: 1,021 Days
• Field of Search: 331/57, 331/176, 331/111, 331/177.R, 331/34, 331/36.C
• US Class Current: 331/57
• CPC Class Codes: H03K 3/011 Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature to maintain energy constant H03K3/015
• CPC Class Codes: H03K 3/0231 Astable circuits H03K3/0315 takes precedence
• CPC Class Codes: H03K 3/03 Astable circuits
• CPC Class Codes: H03K 3/0322 with differential cells
• CPC Class Codes: H03L 1/026 by using a memory for digitally storing correction values H03L1/025 takes precedence
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator

Abstract

A current source and a load circuit. The oscillator circuit may be configured to present an output signal having a frequency in response to (i) a current, (ii) a load, and (iii) an input signal. The current source may be configured to generate the current in response to one or more first control signals. The load circuit may be configured to generate the load in response to one or more second control signals.

Claims

1. A circuit comprising:

an oscillator circuit configured to present an output signal having a frequency in response to (i) a current, (ii) a load, and (iii) an input signal;

a current source configured to generate said current in response to one or more first control signals, wherein a variation of said current calibrates said frequency by setting a coarse frequency; and

a digital to analog converter configured to generate said load in response to one or more second control signals, wherein a variation of said one or more second control signals calibrates said frequency by setting a fine frequency.

2. The circuit according to claim 1, wherein said digital to analog converter comprises a load circuit.

3. The circuit according to claim 1, wherein said digital to analog converter comprises a capacitor digital to analog converter.

4. The circuit according to claim 1, further comprising a biasing circuit configured to regulate a swing size of said output signal.

5. The circuit according to claim 1, wherein said one or more first control signals are generated by a programmable element.

6. The circuit according to claim 5, wherein said programmable element is selected from a group consisting of a random access memory cell (RAM), an erasable programmable read only memory (EPROM), and other types of programmable memory cells.

7. The circuit according to claim 1, wherein said digital-to-analog converter (DAC) circuit is configured to respond to said one or more second control signals in response to a microcontroller.

8. The circuit according to claim 7, wherein said microcontroller adjusts said one or more second control signals and a reference voltage in response to said frequency of oscillation of said output signal.

18. The circuit according to claim 8, wherein microcontroller is further configured to adjust said one or more second control signals to (i) increase said frequency when said frequency is below a first predetermined value or (ii) decrease said frequency when said frequency is above a second predetermined value.

9. A circuit comprising:

means for generating an output signal having a frequency in response to (i) a current, (ii) a load, and (iii) an input signal;

means for generating said current in response to one or more first control signals generated by a programmable element, wherein a variation of said current calibrates said frequency by setting a coarse frequency; and

means for generating said load in response to one or more second control signals, wherein a variation of said one or more second control signals calibrates said frequency by setting a fine frequency.

19. The circuit according to claim 9, further comprising:

means for adjusting said one or more second control signals to increase said frequency when said frequency is below a first predetermined value; and

means for adjusting said one or more second control signals to decrease said frequency when said frequency is above a second predetermined value.

10. A method for generating a signal having an output frequency of oscillation that is temperature insensitive comprising the steps of:

(a) generating said output signal having said output frequency in response to (i) a current, (ii) a load, and (iii) an input signal;

(b) generating said current in response to one or more first control signals generated by a programmable element, wherein a variation of said current calibrates said frequency by setting a coarse frequency; and

(c) generating said load in response to one or more second control signals, wherein a variation of said one or more second control signals calibrates said frequency by setting a fine frequency.

11. The method according to claim 10, wherein said load is generated in response to a digital to analog converter.

12. The method according to claim 11, wherein said digital to analog converter comprises a capacitor digital to analog converter.

13. The method according to claim 10, further comprising the step of:

regulating a swing size of said output signal.

14. The method according to claim 10, wherein said programmable element comprises a random access memory cell (RAM), an erasable programmable read only memory (EPROM), or other type of programmable memory cell.

15. The method according to claim 10, wherein said output frequency is calibrated by:

setting said coarse frequency by varying said current; and

setting said fine frequency by varying said one or more second control signals.

16. The method according to claim 15, wherein said fine frequency is generated in response to said output frequency.

17. The method according to claim 15, wherein said step of setting said fine frequency comprises:

adjusting said one or more second control signals to increase said output frequency when said output frequency is below a first predetermined value; and

adjusting said one or more second control signals to decrease said output frequency when said output frequency is above a second predetermined value.

20. A circuit comprising:

an oscillator circuit configured to present an output signal having a frequency in response to (i) a current, (ii) a load, (iii) a reference voltage, and (iv) an input signal;

a current source configured to generate said current in response to one or more first control signals generated by a programmable element, wherein a variation of said current calibrates said frequency by setting a first frequency; and

a load circuit configured to generate said load in response to one or more second control signals, wherein a variation of said one or more second control signals calibrates said frequency by setting a second frequency.