Shared memory apparatus and method for multiprocessor systems
First Claim
1. An adapter for coupling a processor system to a shared memory unit over a dedicated data link, the processor system having a data bus for access to a local memory and a standard expansion bus coupled to the data bus, the shared memory unit having at least one bank of shared memory, the adapter comprising:
- a expansion bus interface coupling the adapter to the expansion bus of the processor system;
an input/output port coupling the adapter to the shared memory unit via the dedicated data link;
means coupled to the expansion bus interface for monitoring processor memory accesses on the data bus;
means coupled to the data bus monitoring means for detecting when a monitored processor memory access is a processor memory access operation to a memory address value within a range of addresses corresponding to the shared memory;
means coupled to the detecting means for translating the monitored processor memory access operation into a shared memory access request including an associated address and data;
means for outputting the shared memory access request to the input/output port and, in turn, to the shared memory unit; and
means coupled to the expansion bus interface for placing a memory access completion acknowledgement indication on the expansion bus;
whereby it is transparent to the processor system whether the memory access operation is addressed to the local memory or to the shared memory.
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Abstract
A memory alias adapter, coupled to a processor'"'"'s memory bus, monitors processor memory accesses. Whenever a memory access corresponds to shared memory, rather than memory local to the processor, the adapter constructs a memory request message, and transmits the message over a network link to a shared memory unit. The shared memory unit performs the shared memory access and issues a response message over the network link. The memory alias adapter accepts the response message, and completes processor'"'"'s memory access on the memory bus. As a result, it is transparent to the processor whether its memory access is to the local memory or to the shared memory.
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Citations
16 Claims
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1. An adapter for coupling a processor system to a shared memory unit over a dedicated data link, the processor system having a data bus for access to a local memory and a standard expansion bus coupled to the data bus, the shared memory unit having at least one bank of shared memory, the adapter comprising:
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a expansion bus interface coupling the adapter to the expansion bus of the processor system;
an input/output port coupling the adapter to the shared memory unit via the dedicated data link;
means coupled to the expansion bus interface for monitoring processor memory accesses on the data bus;
means coupled to the data bus monitoring means for detecting when a monitored processor memory access is a processor memory access operation to a memory address value within a range of addresses corresponding to the shared memory;
means coupled to the detecting means for translating the monitored processor memory access operation into a shared memory access request including an associated address and data;
means for outputting the shared memory access request to the input/output port and, in turn, to the shared memory unit; and
means coupled to the expansion bus interface for placing a memory access completion acknowledgement indication on the expansion bus;
whereby it is transparent to the processor system whether the memory access operation is addressed to the local memory or to the shared memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method for performing processor memory accesses to a shared memory unit using an adapter coupling a processor system to the shared memory unit via a dedicated data link, the processor system having a standard expansion bus, the adapter having a standard expansion bus interface coupling the adapter to the standard expansion bus of the processor system and an input/output port coupling the adapter to the dedicated data link and, in turn, to the shared memory unit, the method comprising the steps of:
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monitoring processor memory accesses on the standard expansion bus;
detecting when a monitored processor memory access is a processor memory operation to a memory address value within a range of addresses corresponding to the shared memory;
translating the processor memory operation into a shared memory access request including an associated address and data;
outputting the shared memory access request to the input/output port and, in turn, to the shared memory unit via the dedicated data link; and
placing a shared memory access acknowledgement indication on the standard expansion bus;
whereby it is transparent to the processor whether the memory access operation is addressed to the local memory or to the shared memory.
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Specification