Image compression/expansion using parallel decomposition/recomposition
First Claim
1. A method for implementing a compressive transformation of a first representation of a pattern of information made up of a plurality of picture elements into a second representation of the pattern of information, the method comprising the steps of:
- first parallel aggregation of selected ones of said plurality of picture elements into first aggregates, wherein each of said first aggregates includes a copy of more than one of said picture elements; and
second parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates.
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Abstract
A fast method with logarithmic complexity for image compression and expansion is provided, implementable on the Geometric Arithmetic Parallel Processor (GAPP) or any similar fine-grained, mesh-connected Single Instruction-Multiple Datastream (SIMD) array processor. Efficient decomposition of the original image into multiple subimages enables the method to exploit the parallelism of the SIMD computer for implementing powerful multiresolution pyramid and hierarchical image processing techniques on a massively parallel processor.
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Citations
10 Claims
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1. A method for implementing a compressive transformation of a first representation of a pattern of information made up of a plurality of picture elements into a second representation of the pattern of information, the method comprising the steps of:
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first parallel aggregation of selected ones of said plurality of picture elements into first aggregates, wherein each of said first aggregates includes a copy of more than one of said picture elements; and
second parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates.
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2. A method for implementing an expansive transformation of a first representation of a pattern of information made up of a plurality of picture elements into a second representation of the pattern of information, the method comprising the steps of:
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first parallel separation of selected ones of said plurality of picture elements into first aggregates, wherein each of said first aggregates includes copies of fewer of said plurality of picture elements than said first representation; and
second parallel separation of said first aggregates into second aggregates, wherein each second aggregate includes copies of fewer of said plurality of picture elements than each of said first aggregates.
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3. A device for transforming a first representation of an information pattern made up of a plurality of picture elements into a second representation of the information pattern, the device comprising:
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first means for parallel aggregation of selected ones of said plurality of picture elements into first aggregates, wherein each of said first aggregates includes a copy of more than one of said picture elements; and
second means for parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates.
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4. A device for implementing a compressive transformation of a first representation of a pattern of information made up of a plurality of picture elements into a second representation of the pattern of information, the device comprising:
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first means for parallel aggregation of selected ones of said plurality of picture elements into first aggregates, wherein each of said first aggregates includes a copy of more than one of said picture elements; and
second means for parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates.
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5. A device for implementing an expansive transformation of a first representation of a pattern of information made up of a plurality of picture elements into a second representation of the pattern of information, the device comprising:
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first means for parallel separation of a set of said plurality of picture elements of said first representation into first subsets, wherein each of said first subsets includes copies of fewer of said picture elements than said set; and
second means for parallel separation of said first subsets into second subsets, wherein each of said second subsets includes copies of fewer picture elements than said first subset from which said second subset was obtained.
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6. A method of scaling a digital representation of an image, said image being divided into M rows and N columns of P picture elements, M and N being positive integers and P being the product of M and N, said digital representation comprising P digital values each respectively indicative of a characteristic of an associated one of said P picture elements, into a scaled digital representation of said image, said scaled digital representation comprising Q digital values, Q being the product of P and a scaling factor L, said method comprising the steps of:
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loading said digital representation into a processor comprising an array of at least M rows and N columns of processing elements so that each of said processing elements stores an associated loaded one of said P digital values as a stored value;
controlling each row of at least two pairs of rows of processing elements, paired rows being separated by S rows, S being related to L, to operate in parallel to cause each processing element in said each row to replace its associated loaded value as its stored value with the associated loaded digital value from a processing element in the same column at a preselected number of rows away, at least one row of each pair being one of said M rows; and
controlling each column of at least two pairs of columns of processing elements, paired columns being separated by S columns, to operate in parallel to cause each processing element in said each column to replace its associated loaded value as its stored value with the associated loaded digital value from a processing element in the same row at a preselected number of columns away, at least one column of each pair being one of said N columns. - View Dependent Claims (7)
loading said digital representation into a processor comprising an array of at least M rows and N columns of processing elements so that each of said processing elements stores an associated loaded one of said P digital values as a stored value;
controlling each row of at least two pairs of rows of processing elements, paired rows being separated by S rows, S being related to L, to operate in parallel to cause each processing element in said each row to replace its associated loaded value as its stored value with the associated loaded digital value from a processing element in the same column at a preselected number of rows away, at least one row of each pair being one of said M rows; and
controlling each column of at least two pairs of columns of processing elements, paired columns being separated by S columns, to operate in parallel to cause each processing element in said each column to replace its associated loaded value as its stored value with the associated loaded digital value from a processor in the same row at a preselected number of columns away, at least one column of each pair being one of said N columns.
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8. A device for transforming a first representation of an information pattern made up of a plurality of picture elements into a second representation of the information pattern, the device comprising:
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first means for parallel aggregation of selected ones of said plurality of picture elements into first aggregates, wherein each of said first aggregates includes a copy of more than one of said plurality of picture element; and
second means for parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates;
wherein said first and second means for parallel aggregation further comprise a parallel data processor having a plurality of substantially identical cells for processing digital data signals, said parallel data processor further comprising; a controller for generating control signals in response to program instructions; and
a plurality of substantially identical interconnected cells each including a full adder having two data input terminals, a carry input terminal, a sum output terminal, and a carry output terminal, and a plurality of memories connected to said full adder and said controller, the memories each being individually controllable to supply selected ones of a plurality-of predetermined data signals to the input terminals of said full adder in response to control signals from the controller, the memories being connected to the full adder and the controller such that both logical and arithmetic operations are performed by the full adder.
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9. A device for transforming a first representation of an information pattern made up of a plurality of picture elements into a second representation of the information pattern, the device comprising:
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first means for parallel aggregation of selected ones of said plurality of picture elements of said first representation into first aggregates, wherein each of said first aggregates includes a copy of more than one of said plurality of picture elements; and
second means for parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates;
wherein said first and second means for parallel aggregation further comprise a parallel data processor having a plurality of substantially identical cells for processing digital data signals, said parallel data processor further comprising; a controller for generating control signals; and
a plurality of identical cells, each of said identical cells being connected to at least one neighboring cell and responsive to said controller, and adapted to process data from said at least one neighboring cell in accordance with said control signals, said cell including a memory segmented into at least two blocks to be able to perform more than one read/write operation per clock cycle at the direction of said controller.
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10. A device for transforming a first representation of an information pattern made up of a plurality of picture elements into a second representation of the information pattern, the device comprising:
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first means for parallel aggregation of selected ones of said plurality of picture elements of said first representation into first aggregates, wherein each of said first aggregates includes a copy of more than one of said plurality of picture elements; and
second means for parallel aggregation of said first aggregates into second aggregates, wherein each second aggregate includes a copy of more than one of said first aggregates;
wherein said first and second means for parallel aggregation further comprise a parallel data processor having a plurality of substantially identical cells for processing digital data signals, said parallel data processor further comprising; a controller for generating control signals; and
a plurality of identical cells, each of said identical cells being connected to at least one neighboring cell and responsive to said controller, and adapted to process data from said at least one neighboring cell in accordance with said control signals, said cell including a memory having at least two ports to be able to perform more than one read/write operation per clock cycle at the direction of said controller.
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Specification