System for data and interrupt posting for computer devices

• US 6,298,409 B1
• Filed: 03/26/1998
• Issued: 10/02/2001
• Est. Priority Date: 03/26/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Wallach, Walter A., Sheikh, Tahir Q.
• Primary Examiner(s): Sheikh, Ayaz
• Assistant Examiner(s): Jean, Frantz B.
• Application Number:
  US09/048,818
• Time in Patent Office: 1,286 Days
• Field of Search: 710/260, 710/8, 710/128, 710/129, 710/20, 710/40, 710/100, 710/107, 710/113, 710/62, 710/116, 707/101, 709/400, 712/11, 712/15, 712/20, 712/29, 714/14, 714/12, 714/22, 714/11, 711/202
• US Class Current: 710/260
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence

Abstract

A system for monitoring issuance of interrupt and transaction commands without involving central processor units of computer systems. The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands issued by devices. The system further employs a concurrent bridge to support communication between the controllers and at least one host device. With this system, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved.

Claims

1. A system for managing a transaction initiated by a first device, the system comprising:

a central processor configured to handle the transaction in response to issuance of an interrupt;

a bridge electrically coupled to the first device, the bridge providing communication between the first device and at least a second device; and

a controller electrically coupled to the bridge, the controller being configured to forward a transaction command to its destination, wherein the controller is further configured to determine if it is necessary to interrupt the central processor; and

wherein the central processor is interrupted in the event that communication between the first device and the second device necessitates involving the central processor.

2. The system as defined in claim 1, wherein the controller determines if the transaction command is directed to the second device.

3. The system as defined in claim 1, wherein the controller forwards the transaction command to the second device if the transaction command is intended for the second device.

4. The system as defined in claim 1, further comprising a concurrent bridge electrically connected to the controller.

5. The system as defined in claim 4, wherein the controller forwards the transaction command to the concurrent bridge if the transaction is intended to a host device.

6. The system as defined in claim 1, wherein the controller communicates with the first device via the bridge.

7. A system for managing a transaction initiated by a first device, the system comprising:

a central processor configured to handle the transaction in response to an interrupt issued in the event that communication between the first device and a second device necessitates involving the central processor;

a first bridge electrically connected to the first device, the first bridge providing communication between the first device and at least the second device;

a first controller electrically connected to the first device, the first controller being configured to manage the transaction;

a second controller electrically connected to the first device, the second controller being configured to manage the interrupt initiated by the first device, wherein the controller is further configured to determine if it is necessary to interrupt the central processor; and

a second bridge electrically connected to the first and second controllers, the second bridge providing communication between at least one of the first and second controllers and at least one host device.

8. The system as defined in claim 7, further comprising a central processor.

9. The system as defined in claim 7, wherein the first and second controllers are electrically connected to the second device.

10. In a computer system having a central processor and a controller determining if it is necessary to interrupt the central processor, a program storage device storing instructions that when executed by the computer perform a method of managing a transaction command initiated by a first device, the method comprising:

issuing the transaction to a second device;

establishing a handshake between the first device and the controller;

interrupting the central processor in the event that communication between the first and second devices necessitates involving the central processor; and

forwarding the transaction command to the second device.

11. The storage device as defined in claim 10, wherein the act of checking for availability of the controller includes the act of communicating to a bridge.

12. The storage device as defined in claim 10, wherein the act of determining the intended destination includes the act of determining if the transaction command is directed to the second device.

13. The storage device as defined in claim 12, wherein the method includes the act of forwarding the transaction command to the second device if the transaction command is intended for the second device.

14. The storage device as defined in claim 13, wherein the method includes the act of forwarding the transaction command to a bridge.

15. The storage device as defined in claim 10, wherein the method includes the act of determining if the transaction command is directed to a host device when performing the act of determining intended destination of the transaction command.

16. The storage device as defined in claim 15, wherein the method includes the act of forwarding the transaction command to a host device if the transaction command is intended for the host device.

17. The storage device as defined in claim 16, wherein the method includes the act of forwarding the transaction command to a bridge.