Transport stream multiplexing apparatus capable of accommodating plurality of streams

• US 6,301,248 B1
• Filed: 07/09/1998
• Issued: 10/09/2001
• Est. Priority Date: 07/10/1997
• Status: Expired due to Term

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Choi, Jun Kyun, Hwang, Yeong Weon, Choi, Kang Il, Jung, Dong Bun
• Primary Examiner(s): Ton, Dang
• Assistant Examiner(s): Sam, Phirin
• Application Number:
  US09/112,711
• Time in Patent Office: 1,188 Days
• Field of Search: 370/392, 370/359, 370/389, 370/394, 370/412, 370/413, 370/415, 370/417, 370/419, 370/423, 370/465, 370/474, 370/537, 370/538, 370/539, 370/541, 370/395, 370/345, 370/396, 370/532, 370/540, 370/904
• US Class Current: 370/392
• CPC Class Codes: H04L 12/2801 Broadband local area networks
• CPC Class Codes: H04L 2012/5664 Support of Video, e.g. MPEG
• CPC Class Codes: H04L 2012/5671 Support of voice
• CPC Class Codes: H04L 2012/5672 Multiplexing, e.g. coding, scrambling

Abstract

This invention is directed to a TS(Transport Stream) multiplexing apparatus capable of accommodating plurality of PES(Packetized Elementary Stream). The present invention provides a transport stream multiplexing apparatus which is capable of multiplexing in only one transport stream multiplexing apparatus plurality of PES streams transmitted from the respective encoders by simplifying an interface between the encoders and the transport stream multiplexing apparatus by means of a PCI bus. A transport stream multiplexing apparatus of the present invention comprises a PCI interface processor for transmitting distinctly plurality of stream transmitted through a PCI bus; control signal processor for outputting a selection signal, an input signal and a transmission control signal; media buffer for outputing a transport stream packet and a transport stream payload; timing processor for outputting a timing signal required for outputting a packet; multiplexing controller for outputting a transport stream header output signal; header processing means for outputting header data in response to the transport stream header output signal; and multiplexor for multiplexing the transport stream packet and the transport stream payload input from the media buffer and outputting the transport stream packet.

Claims

1. A transport stream (TS) multiplexing apparatus, comprising:

matching means for receiving data signals and control signals for an external source and distinctly outputting said control signals as an address signal and a read/write signals and outputting said data signals;

control signal processing means for receiving said address signal and said read/write signal and outputting a selection signal, an input signal, and a transmission control signal;

buffering means for receiving said data signals, said selection signal, and said input signal, storing said data signals in response to said selection signal and said input signal, and outputting an output request signal;

timing processing means for receiving a reset signal and a clock signal from an external source and generating a timing signal and a program clock reference (PCR) data in response to said reset signal and said clock signal;

multiplexing control means for receiving said output request signal, said clock signal, said reset signal and a set signal from said external source, and said timing signal, processing said output request according to an output schedule, and outputting a payload output signal, a retransmission signal and a TS header output signal;

said buffering means further comprising means for receiving said payload output signal and said retransmission signal and outputting a TS packet and a TS payload in response to said payload output signal and said retransmission signal;

header processing means for receiving said transmission control signal, said TS header output signal, said PCR data and said data signal, processing said data signals and PCR data in response to said transmission control signal and outputting a TS header data in response to said TS header output signal; and

packet multiplexing means for receiving and multiplexing said TS header data, said TS packet and said TS payload and outputting said TS packet.

2. The apparatus of claims 1, wherein said control signal output by said matching means further comprise a program map table TS packet and a program combining table TS packet and said buffering means comprises:

a plurality of video buffering means for receiving said payload output signal, said selection signal, said input signal, and said data signals, storing said data signals in response to said selection signal and said input signal, transmitting an output request signal to said multiplexing control means, and outputting a video TS payload to said multiplexing control means in response to said payload output signal;

a plurality of audio buffering means for receiving said payload output signal, said selection signal, said input signal, and said data signals, storing said data signals in response to said selection signal and said input signal, transmitting an output request signal to said multiplexing control means and outputting an audio TS payload to said multiplexing control means in response to said payload output signal;

program map buffering means for receiving said program map table TS packet, said selection signal, said input signal, said retransmission signal, and said payload output signal, storing said program map table TS packet in response to said selection signal and input signal, determining a retransmission mode in response to said retransmission signal, and transmitting said program map table TS packet to said multiplexing means in response to said payload output signal; and

program combining table buffering means for receiving said program combining table buffering TS packet, said input signal, said selection signal, said retransmission signal, and said payload output signal, storing said program combining table TS packet in response to said selection signal and said input signal, determining a retransmission mode in response to said retransmission signal, and transmitting the program combining table TS packet to said multiplexing control means.

3. The apparatus of claim 1, wherein said multiplexing control means comprises:

counting means for receiving said set signal, said reset signal, said clock signal, and a counter end signal, starting internal counting in response to said set signal, said reset signal and said clock signal, and periodically outputting a counter value in response to said counter end signal;

output arbitration means for receiving said clock signal, an output arbitration control signal, said timing signal, and plural ones of said output request signal, initializing output arbitration in response to said clock signal and said output arbitration control signal, and generating a TS packet enable signal in response to said plural ones of said output request signal; and

output signal generating means for receiving said counter value and said TS packet enable signal, outputting said counter end signal when a limited counter area is finished, outputting said output arbitration control signal, outputting said TS header output signal corresponding to said TS packet enable signal, and outputting said retransmission signal to said buffering means for outputting said said TS packet to said packet multiplexing means from said buffering means.

4. The apparatus of claim 1, wherein said timing processing means comprises:

extension field counting means for receiving said clock signal and said reset signal, and outputting another clock signal and a first counter value in response thereto;

basic field counting means for receiving said clock signal, said reset signal, and said another clock signal and outputting a second counter value in response to said clock signal, said reset signal, and said another clock signal;

payload combining means for receiving said first counter value and said second counter value, adding a stepping bit between said first counter value and said second counter value, and outputting said PCR data; and

packet timing means for receiving said clock signal, said reset signal and said another clock signal and outputting said timing signal.

5. The apparatus of claim 1, wherein said matching means comprise means for outputting a TS video header, a TS audio header, and a TS PCR header, said header processing means further comprising:

a plurality of video buffering means for receiving said TS video header, said transmission control signal, and said TS header output signal, storing said TS video header in response to said transmission control signal, and outputting said TS video header to said multiplexing control means in response to said TS header output signal;

a plurality of audio buffering means for receiving said TS audio header, said transmission control signal, and said TS header output signal, storing said TS audio header in response to said transmission control signal, and outputting said TS audio header to said multiplexing control means in response to said TS header output signal; and

a plurality of PCR buffering means for receiving said TS PCR header, said transmission control signal, and said TS header output signal, storing said TS PCR header in response to said transmission control signal, and outputting said TS PCR header to said multiplexing control means in response to said TS header output signal.