Tagging echoes with low frequency noise
First Claim
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1. Apparatus for adjusting the delay of a first signal relative to a composite signal containing an echo of said first signal, said apparatus comprising:
- a noise generator;
a summing circuit having a first input for receiving said first signal, a second input coupled to said noise generator, and an output;
first, second, and third variable delay circuits, wherein the delay introduced by the first delay circuit is greater than the delay introduced by the second delay circuit, which is greater than the delay introduced by the third delay circuit, the output of the summing circuit being coupled to an input of each of said first, second, and third variable delay circuits;
a first multiplier having a first input coupled to the first delay circuit and a second input coupled to receive said composite signal;
a second multiplier having a first input coupled to the third delay circuit and a second input coupled to receive said composite signal;
a difference circuit coupled to the first multiplier and to the second multiplier, said difference circuit having an output coupled to a control input of each of said first, second, and third variable delay circuits.
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Abstract
A low pass limited, low frequency pseudo-random noise signal is added to the input signal for tagging the input signal in order to facilitate correlation with an echo.
33 Citations
4 Claims
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1. Apparatus for adjusting the delay of a first signal relative to a composite signal containing an echo of said first signal, said apparatus comprising:
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a noise generator;
a summing circuit having a first input for receiving said first signal, a second input coupled to said noise generator, and an output;
first, second, and third variable delay circuits, wherein the delay introduced by the first delay circuit is greater than the delay introduced by the second delay circuit, which is greater than the delay introduced by the third delay circuit, the output of the summing circuit being coupled to an input of each of said first, second, and third variable delay circuits;
a first multiplier having a first input coupled to the first delay circuit and a second input coupled to receive said composite signal;
a second multiplier having a first input coupled to the third delay circuit and a second input coupled to receive said composite signal;
a difference circuit coupled to the first multiplier and to the second multiplier, said difference circuit having an output coupled to a control input of each of said first, second, and third variable delay circuits. - View Dependent Claims (2, 3, 4)
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Specification
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Current AssigneeCirrus Logic Incorporated
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Original AssigneeAcoustic Technologies Incorporated (Cirrus Logic Incorporated)
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InventorsLowmiller, Donald Allan, Thomasson, Samuel L., Moore, Kendall G.
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Primary Examiner(s)Isen, Forester W.
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Assistant Examiner(s)PENDLETON, BRIAN T
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Application NumberUS09/413,675Time in Patent Office734 DaysField of Search379/406, 379/410, 379/411, 381/83, 381/93, 381/66, 381/318US Class Current381/66CPC Class CodesH04M 9/082 using echo cancellers echo ...
