Plasma processes for depositing low dielectric constant films

• US 6,303,523 B2
• Filed: 11/04/1998
• Issued: 10/16/2001
• Est. Priority Date: 02/11/1998
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Lu, Yung-Cheng, Cheung, David, Barnes, Michael, Ishikawa, Tetsuya, Jeng, Shin-Puu, Yau, Wai-Fan, Mandal, Robert P., Poon, Tze Wing, Liu, Kuo-Wei, Willecke, Ralf B., Moghadam, Farhad
• Primary Examiner(s): MEEKS, TIMOTHY HOWARD
• Application Number:
  US09/185,555
• Publication Number:
  US 20010004479A1
• Time in Patent Office: 1,077 Days
• Field of Search: 427/489, 427/492, 427/497, 427/503, 427/509, 427/515, 427/577, 427/578, 427/579, 427/249.15, 427/255.37, 427/255.6, 438/780, 438/781, 438/789
• US Class Current: 438/780
• CPC Class Codes: C23C 16/401 containing silicon
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02203 the layer being porous
• CPC Class Codes: H01L 21/02208 the precursor containing a compound comprising Si
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02216 the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/02362 formation of intermediate layers, e.g. capping layers or diffusion barriers
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76808 involving intermediate temporary filling with material
• CPC Class Codes: H01L 21/7681 involving one or more buried masks
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76832 Multiple layers
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76835 Combinations of two or more different dielectric layers having a low dielectric constant H01L21/76832 takes precedence
• CPC Class Codes: H01L 2221/1031 Dual damascene by forming vias in the via-level dielectric prior to deposition of the trench-level dielectric
• CPC Class Codes: Y10T 428/24926 : including ceramic, glass, porcelain or quartz layer
• CPC Class Codes: Y10T 428/31663 : As siloxane, silicone or silane

Abstract

A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH₃SiH₃, or dimethylsilane, (CH₃)₂SiH₂, and nitrous oxide, N₂O, at a constant RF power level from about 10 W to about 150 W, or a pulsed RF power level from about 20 W to about 250 W during 10% to 30% of the duty cycle.

Claims

1. A process for depositing a low dielectric constant film on a semiconductor substrate, comprising reacting one or more silicon compounds with an oxidizing gas while applying RF power to deposit the low dielectric constant film on the semiconductor substrate, wherein each silicon compound comprises from one to three alkyl groups bonded to silicon and at least one silicon-hydrogen bond, and wherein the low dielectric constant film is located between conductive materials and retains sufficient silicon-carbon bonds to have a carbon content from 1% to 50% by atomic weight and a dielectric constant of about 3 or less.

2. The process of claim 1, wherein the oxidizing gas comprises oxygen.

3. The method of claim 1, wherein the oxidizing gas and the one or more silicon compounds are reacted at a substrate temperature from about −

20°

C. to about 400°

C.

4. The method of claim 1, wherein the low dielectric constant film is located between interconnect lines.

5. The method of claim 1, wherein the RF power is provided by a mixed frequency power source.

6. The method of claim 5, wherein the mixed frequency power source provides RF power at a high frequency of about 13.56 MHz and a low frequency of about 360 KHz to about 1 MHz.

7. The method of claim 1, wherein the oxidizing gas comprises N₂O.

8. The method of claim 1, wherein the low dielectric constant film is annealed.

9. The method of claim 1, wherein a dielectric material is deposited on the low dielectric constant film.

10. The method of claim 1, wherein the one or more silicon compounds comprises methylsilane.

11. A process for depositing a low dielectric constant film, comprising:

depositing a low dielectric constant film by reacting a compound comprising at least one silicon atom with an oxidizing gas while applying RF power, wherein each silicon atom is bonded to one, two, or three alkyl groups and to at least one hydrogen atom, and wherein the film retains sufficient silicon-carbon bonds to have a carbon content from 1% to 50% by atomic weight and a dielectric constant of about 3 or less;

etching at least one opening in the film; and

depositing a conductive material in the opening.

12. The process of claim 11, wherein the compound is selected from the group consisting of methylsilane, dimethylsilane, trimethylsilane, and combinations thereof.

13. The process of claim 11, wherein the conductive material is copper.

14. The method of claim 11, wherein the film is deposited at a substrate temperature from about −

20°

C. to about 400°

C.

15. The method of claim 11, wherein the opening in the film is an interconnect line.

16. The method of claim 11, wherein the oxidizing gas comprises O₂ or N₂O.

17. The method of claim 11, wherein the compound is methylsilane.

18. The method of claim 11, wherein the compound is trimethylsilane.

19. A method for depositing a low dielectric constant film, comprising:

depositing a low dielectric constant film by reacting trimethylsilane with an oxidizing gas while applying RF power, wherein the film comprises a carbon content from 1% to 50% by atomic weight and a dielectric constant of about 3 or less;

etching at least one opening in the film; and

depositing a conductive material in the opening.

20. The method of claim 19, wherein the conditions comprise a substrate temperature from about −

20°

C. to about 400°

C.

21. The method of claim 19, wherein the oxidizing gas comprises O₂.

22. The method of claim 19, wherein the oxidizing gas comprises N₂O.

23. The method of claim 19, wherein the low dielectric constant film is annealed.

24. The method of claim 19, wherein a dielectric material is deposited on the low dielectric constant film.

25. A method for depositing a low dielectric constant film on a semiconductor substrate, comprising reacting trimethylsilane and an oxidizing gas while applying RF power to deposit a low dielectric constant film on the semiconductor substrate, wherein the low dielectric constant film has a carbon content from 1% to 50% by atomic weight, and has a dielectric constant of about 3 or less.

26. The method of claim 25, wherein the oxidizing gas comprises O₂.

27. The method of claim 25, wherein the oxidizing gas comprises N₂O.

28. The method of claim 25, wherein the RF power is provided by a mixed frequency power source.

29. The method of claim 28, wherein the mixed frequency power source provides RF power at a high frequency of about 13.56 MHz and a low frequency of about 360 KHz to about 1 MHz.

30. The method of claim 25, wherein the low dielectric constant film is deposited at a substrate temperature from about −

20°

C. to about 400°

C.

31. The method of claim 25, wherein the low dielectric constant film is annealed.

32. The method of claim 25, wherein a dielectric layer is deposited on the low dielectric constant film.

33. A method for depositing a low dielectric constant film, comprising:

depositing a conformal lining layer on a patterned metal layer from process gases comprising one or more silicon compounds and an oxidizing gas while applying RF power, wherein each silicon atom in each silicon compound is bonded to one, two, or three alkyl groups and to at least one hydrogen atom, and wherein the conformal lining layer retains sufficient silicon-carbon bonds to have a dielectric constant of about 3 or less and a carbon content from 1% to 50% by atomic weight; and

depositing a gap filling layer on the conformal lining layer.

34. The method of claim 33, wherein the one or more silicon compounds are selected from the group consisting of methylsilane, dimethylsilane, trimethylsilane, and combinations thereof.

35. The method of claim 33, wherein the gap filling layer is deposited by reaction of methylsilane and hydrogen peroxide.

36. The method of claim 33, wherein the conformal lining layer is deposited at a substrate temperature from about −

20°

C. to about 400°

C.

37. The method of claim 33, wherein the conformal lining layer is deposited on metal lines.

38. The method of claim 33, wherein the oxidizing gas comprises O₂ or N₂O.

39. The method of claim 33, wherein the conformal lining layer is annealed.

40. A method for depositing a low dielectric constant film on a semiconductor substrate, comprising reacting methylsilane and an oxidizing gas while applying RF power to deposit a dielectric film on a substrate, wherein the dielectric film has a carbon content from 1% to 50% by atomic weight and a dielectric constant less than about 3.

41. The method of claim 40, wherein the oxidizing gas comprises O₂.

42. The method of claim 40, wherein the oxidizing gas comprises N₂O.

43. The method of claim 40, wherein the RF power is provided by a mixed frequency power source.

44. The method of claim 40, wherein the mixed frequency power source provides RF power at a high frequency of about 13.56 MHz and a low frequency of about 360 KHz to about 1 MHz.

45. The method of claim 40, wherein the low dielectric constant film is deposited at a substrate temperature from about −

20°

C. to about 400°

C.

46. The method of claim 40, wherein the low dielectric constant film is annealed.

47. The method of claim 40, wherein a dielectric layer is deposited on the low dielectric constant film.

48. A method for depositing a low dielectric constant film on a semiconductor substrate, comprising reacting an organosilane compound consisting of carbon, silicon, and hydrogen with an oxidizing gas while applying RF power to deposit a dielectric film on the semiconductor substrate, wherein the organosilane compound has three alkyl groups bonded to silicon and one hydrogen bonded to silicon, and the dielectric film has a carbon content from 1% to 50% by atomic weight and a dielectric constant less than about 3.

49. The method of claim 48, wherein the oxidizing gas comprises O₂.

50. The method of claim 48, wherein the oxidizing gas comprises N₂O.

51. The method of claim 48, wherein the low dielectric constant film is deposited at a substrate temperature from about −

20°

C. to about 400°

C.

52. The method of claim 48, wherein the low dielectric constant film is annealed.

53. The method of claim 48, wherein a dielectric layer is deposited on the low dielectric constant film.