Inductor for semiconductor device and method for making the same

• US 6,303,971 B1
• Filed: 11/19/1997
• Issued: 10/16/2001
• Est. Priority Date: 11/19/1996
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Rhee, Tae-Pok
• Primary Examiner(s): Jackson, Jr., Jerome
• Application Number:
  US08/974,371
• Time in Patent Office: 1,427 Days
• Field of Search: 257/531, 257/534
• US Class Current: 257/531
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors

Abstract

An inductor for a semiconductor device is formed within a groove in an insulating layer on a semiconductor substrate. A number of lower conductive lines are formed across the groove. A cylindrical insulator is formed over the lower conductive lines and aligned with the groove. Upper conductive lines are formed over the cylindrical insulator. The upper and lower conductive lines are slanted lengthwise along the groove in opposite directions to form a spiral coil having a circular cross-section, thereby preventing abrupt changes in the magnetic field. The ends of upper conductive lines contact the ends of the lower conductive lines so that the thickness of the coil is controlled by the thickness of the cylindrical insulator, thereby allowing the self-inductance to be increased and the positional density of the conductive lines to be freely controlled.

Claims

1. A semiconductor device including an inductor, comprising:

an insulating layer formed on a semiconductor substrate;

a groove having a semicircular cross-section formed in said insulating layer;

a cylindrical insulator aligned with said groove; and

a spiral inductor having lower conductive lines formed between said insulator and said groove, and upper conductive lines formed over said insulator and electrically communicating with said lower conductive lines.

2. A semiconductor device as claimed in claim 1, wherein:

said lower conductive lines are formed across said groove and slant longitudinally along said groove with a predetermined distance therebetween; and

said upper conductive lines are formed across said insulator and slant longitudinally along said insulator with a predetermined distance therebetween.

3. A semiconductor device as claimed in claim 1, wherein:

a first end of one upper conductive line contacts a first lower conductive line; and

a second end of the one upper conductive line contacts a second lower conductive line.

4. A semiconductor device as claimed in claim 1, wherein said lower and upper conductive lines are made of Poly-doped silicon or a conductive material such as tungsten.

5. A semiconductor device as claimed in claim 1, wherein said semiconductor substrate is a silicon substrate or a compound semiconductor substrate such as gallium arsenide.

6. A semiconductor device as claimed in claim 1, wherein said lower conductive lines are covered with an oxide film and an oxidization prevention layer except for end portions thereof.

8. A semiconductor device as claimed in claim 1, wherein a buried material is buried between said lower conductive lines.

9. A semiconductor device as claimed in claim 8, wherein said buried material is spin-on-glass (SOG).

18. A semiconductor device as claimed in claim 1, further comprising a magnetic core formed above the lower conductive lines and below the insulator.

7. A semiconductor device including an inductor, comprising:

an insulating layer formed on a semiconductor substrate;

a groove formed in said insulating layer;

a cylindrical insulator aligned with said groove; and

a spiral inductor having lower conductive lines formed between said insulator and said groove, and upper conductive lines formed over said insulator and electrically communicating with said lower conductive lines;

wherein said lower conductive lines are covered with an oxide film and an oxidization prevention layer except for end portions thereof; and

wherein said oxidization prevention layer is formed of nitride.

10. A semiconductor device including an inductor, comprising:

a groove having a semicircular cross-section formed in an insulating layer on a semiconductor substrate;

a magnetic core aligned with said groove; and

a spiral inductor having lower conductive lines formed between said magnetic core and said groove, and upper conductive lines formed over said magnetic core and electrically communicating with said lower conductive lines.

11. A semiconductor device as claimed in claim 10, wherein:

said lower conductive lines are formed across said groove and slant longitudinally along said groove with a predetermined distance therebetween; and

said upper conductive lines are formed across said core and slant longitudinally along said core with a predetermined distance therebetween.

12. A semiconductor device as claimed in claim 10, wherein:

a first end of one upper conductive line contacts a first lower conductive line; and

a second end of the one upper conductive line contacts a second lower conductive line.

13. A semiconductor device as claimed in claim 10, wherein said lower and upper conductive lines are formed from aluminum or copper.

14. A semiconductor device as claimed in claim 10, wherein said semiconductor substrate is silicon or a compound such as gallium arsenide.

15. A semiconductor device as claimed in claim 10, wherein an oxide film is formed between said insulating layer and said lower conductive lines, and between said lower conductive lines and said upper conductive lines.

16. A semiconductor device as claimed in claim 15, wherein said magnetic core is enclosed by said oxide film.

17. A semiconductor device as claimed in claim 10, wherein a protection layer is formed on said substrate including said inductor.