System for real-time control of semiconductor wafer polishing

• US 6,306,009 B1
• Filed: 11/19/1999
• Issued: 10/23/2001
• Est. Priority Date: 08/25/1993
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Sandhu, Gurtej S., Doan, Trung Tri
• Primary Examiner(s): Eley, Timothy V.
• Application Number:
  US09/444,022
• Time in Patent Office: 704 Days
• Field of Search: 437/7, 437/8, 437/225, 437/249, 451/5, 451/6, 451/7, 451/8, 451/10, 451/41, 451/42, 451/53, 451/54, 451/55, 451/59, 451/60, 451/63, 451/286, 451/287, 451/288, 451/289, 451/290, 451/398
• US Class Current: 451/7
• CPC Class Codes: B23Q 15/013 Control or regulation of feed movement B23Q15/12 takes precedence
• CPC Class Codes: B23Q 15/12 Adaptive control, i.e. adjusting itself to have a performance which is optimum according to a preassigned criterion
• CPC Class Codes: B24B 13/015 of television picture tube viewing panels, headlight reflectors or the like
• CPC Class Codes: B24B 37/013 Devices or means for detecting lapping completion
• CPC Class Codes: B24B 37/015 Temperature control
• CPC Class Codes: B24B 37/107 in a rotary movement only, about an axis being stationary during lapping
• CPC Class Codes: B24B 37/12 Lapping plates for working plane surfaces
• CPC Class Codes: B24B 37/205 provided with a window for inspecting the surface of the work being lapped
• CPC Class Codes: B24B 49/003 involving acoustic means
• CPC Class Codes: B24B 49/02 according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent B24B49/12 takes precedence
• CPC Class Codes: B24B 49/04 involving measurement of the workpiece at the place of grinding during grinding operation
• CPC Class Codes: B24B 49/10 involving electrical means B24B49/02, B24B49/08 take precedence
• CPC Class Codes: B24B 49/12 involving optical means
• CPC Class Codes: B24B 57/02 for feeding of fluid, sprayed, pulverised, or liquefied grinding, polishing or lapping agents
• CPC Class Codes: G05B 19/404 characterised by control arrangements for compensation, e.g. for backlash, overshoot, tool offset, tool wear, temperature, machine construction errors, load, inertia G05B19/19, G05B19/41 take precedence
• CPC Class Codes: G05B 2219/34403 RTI real time, kernel, processing
• CPC Class Codes: G05B 2219/37398 Thickness
• CPC Class Codes: G05B 2219/37602 Material removal rate
• CPC Class Codes: G05B 2219/45026 Circuit board, pcb
• CPC Class Codes: G05B 2219/45199 Polish
• CPC Class Codes: G05B 2219/45232 : CMP chemical mechanical polishing of wafer
• CPC Class Codes: G05B 2219/49052 : Accessory, coolant
• CPC Class Codes: G05B 2219/49057 : Controlling temperature of workpiece, tool, probe holder

Abstract

A system for polishing a semiconductor wafer, the system comprising a wafer polishing assembly for polishing a face of a semiconductor wafer at a polishing rate and a polishing uniformity, the wafer polishing assembly including a platen subassembly defining a polishing area, and a polishing head selectively supporting a semiconductor wafer and holding a face of the semiconductor wafer in contact with the platen subassembly to polish the wafer face; and a controller selectively adjusting one of a plurality of adjustable polishing parameters during polishing of the wafer.

Claims

1. A semiconductor substrate polisher comprising:

a supporter configured to support a substrate while leaving a face of the substrate exposed;

a polishing surface configured to be supported under the exposed face of the substrate;

at least one applicator within the supporter, wherein the applicator is configured to sense a pressure of the polishing surface against the wafer, wherein the applicator is configured to exert a force against the semiconductor substrate to move at least a portion of the substrate toward the polishing surface; and

a temperature sensor configured to be coupled to the substrate.

2. The semiconductor substrate polisher of claim 1, further comprising a temperature controlling unit coupled to the polishing surface for changing a temperature of the substrate in response to a temperature from the temperature sensor.

3. The semiconductor substrate polisher of claim 2, wherein the polishing surface is supported by a platen having a hollow interior and wherein the temperature controlling unit comprises:

a reservoir configured to hold a quantity of fluid;

a pump coupled to the reservoir, the pump configured to pump fluid from the reservoir and into the hollow interior of the platen; and

a temperature conditioning unit for modifying a temperature of the fluid as the fluid is pumped into the platen.

4. The semiconductor substrate polisher of claim 3, wherein the temperature controlling unit is configured to heat the fluid.

5. The semiconductor substrate polisher of claim 3, wherein the temperature controlling unit is configured to cool the fluid.

6. The semiconductor substrate polisher of claim 3, wherein the temperature controlling unit is configured to cool or heat the fluid.

7. The semiconductor substrate polisher of claim 3, further comprising a chemical supply port directed to the polishing surface.

8. The semiconductor substrate polisher of claim 1, further comprising a chemical supply port directed to the polishing surface.

9. The wafer polisher in claim 1, further comprising:

a temperature sensor configured to be coupled to the wafer; and

a feedback/control system configured to modify polishing parameters of the wafer polisher, wherein the feedback/control system is configured to be responsive to a temperature of the workpiece as determined by the temperature sensor.

10. The wafer polisher in claim 9, wherein said chemical supply port is configured to dispense a fluid onto said polishing pad.

11. The wafer polisher in claim 10, wherein said chemical supply port is configured to dispense a liquid onto said polishing pad.

12. The wafer polisher in claim 11, wherein said chemical supply port is configured to dispense a slurry onto said polishing pad.

13. A planarization system configured to planarize a workpiece having a non-uniform surface, comprising:

a pressure applicator configured to be oriented toward said non-uniform surface of said workpiece;

a feedback/control system coupled to said pressure applicator, wherein said feedback/control system is configured to receive pressure information from said pressure applicator and to transmit pressure commands to said pressure applicator;

a carrier pad between said pressure applicator and said non-uniform surface;

a platen subassembly configured to receive said non-uniform surface; and

a workpiece holder configured to support said workpiece and bias said workpiece against said platen subassembly.

14. The planarization system in claim 13, wherein said carrier pad is configured to comprise a second surface of said workpiece.

15. The planarization system in claim 13, wherein said carrier pad comprises a pad.

16. The planarization system in claim 15, wherein said pad comprises a carrier pad.

17. The planarization system in claim 13, further comprising a temperature sensor configured to be coupled to the workpiece and to the feedback/control system, wherein the feedback/control system is configured to be responsive to a temperature of the workpiece as determined by the temperature sensor.

18. A semiconductor substrate polisher, comprising:

a supporter configured to support a substrate while leaving a face of said substrate exposed;

a polishing surface configured to be supported under said exposed face of said substrate;

a pressurizer configured to be positioned over said face and configured to exert a force against said semiconductor substrate to move at least a portion of said substrate toward said polishing surface; and

a temperature sensor configured to be coupled to the substrate, wherein the pressurizer is responsive to a temperature of the substrate as determined by the temperature sensor.

19. The semiconductor substrate polisher of claim 18, wherein said polishing surface comprises at least a portion that is parallel to said semiconductor substrate.

20. The semiconductor substrate polisher of claim 19, wherein said polishing surface is a moving polishing surface.

21. The semiconductor substrate polisher of claim 20, wherein said polishing surface is a rotating polishing surface.

22. The semiconductor substrate polisher of claim 21, wherein said movement of said substrate toward polishing surface is along a first axis, and wherein said rotating polishing surface defines an axis of rotation parallel to said first axis.

23. The semiconductor substrate polisher of claim 22, wherein said polishing surface is circular.

24. A semiconductor substrate polisher comprising:

a supporter configured to support a substrate while leaving a face of the substrate exposed;

a polishing surface configured to be supported under the exposed face of the substrate;

at least one applicator within the supporter, wherein the applicator is configured to sense a pressure of the polishing surface against the wafer, wherein the applicator is configured to exert a force against the semiconductor substrate to move at least a portion of the substrate toward the polishing surface;

a temperature sensor configured to be coupled to the substrate; and

a temperature controlling unit coupled to the polishing surface for changing a temperature of the substrate in response to a temperature from the temperature sensor.

25. The semiconductor substrate polisher of claim 24, wherein the polishing surface is supported by a platen having a hollow interior and wherein the temperature controlling unit comprises:

a reservoir configured to hold a quantity of fluid;

a pump coupled to the reservoir, the pump configured to pump fluid from the reservoir and into the hollow interior of the platen; and

a temperature conditioning unit for modifying a temperature of the fluid as the fluid is pumped into the platen.

26. The semiconductor substrate polisher of claim 25, wherein the temperature controlling unit is configured to heat the fluid.

27. The semiconductor substrate polisher of claim 25, wherein the temperature controlling unit is configured to cool the fluid.

28. The semiconductor substrate polisher of claim 25, wherein the temperature controlling unit is configured to cool or heat the fluid.

29. The semiconductor substrate polisher of claim 25, further comprising a chemical supply port directed to the polishing surface.