Process of fabricating a semiconductor device

US 6,306,694 B1
Filed: 03/10/2000
Issued: 10/23/2001
Est. Priority Date: 03/12/1999
Status: Expired due to Term

First Claim

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1. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;

forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing a n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said semiconductor film to a second optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

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Abstract

A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed.

In an n-channel type TFT 302, an Lov region 207 is disposed, whereby a TFT structure highly resistant to hot carriers is realized. Further, in an n-channel type TFT 304 forming a pixel portion, Loff regions 217 to 220 are disposed, whereby a TFT structure having a low OFF-current value is realized. In this case, in the Lov region, the n-type impurity element exists at a concentration higher than that of the Loff regions, and the whole of the n-type impurity region (b) which constitutes the Lov region is sufficiently activated by optical annealing, so that a good junction portion is formed between the n-type impurity region and the channel forming region.

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56 Claims

1. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing a n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said semiconductor film to a second optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).
- View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 32)
- - 20. The process of fabricating a semiconductor device according to any one of claims 1 to 19,
21. The process of fabricating a semiconductor deice according to anyone of claims 1 to 19,wherein said p-type impurity regions (a) contains said p-type impurity element is contained at a concentration of 3×
- 10²⁰to 3×
  
  10²¹atoms/cm3, and wherein said p-type impurity regions (b) contains said p-type impurity element at a concentration of 1×
  
  10¹⁵to 1×
  
  10¹⁸atoms/cm³.
22. The process of fabricating a semiconductor device according to any one of claims 1 to 19,wherein said n-type impurity element is introduced in such a manner that the resistance values of said n-type impurity regions (a), (b) and (c) are made greater in the order of said n-type impurity regions (a)<
- said n-type impurity regions (b)<
  
  said n-type impurity regions (c), and wherein said p-type impurity element is introduced in such a manner that the resistance values of said p-type impurity regions (a), (b) are made greater in the order of said p-type impurity regions (a)<
  
  said p-type impurity regions (b).
23. The process of fabricating a semiconductor device according to any one of claims 1 to 19, wherein the concentration of said n-type impurity element contained in said n-type impurity regions (c) is ½
- to {fraction (1/10)} times as high as that of said n-type impurity element contained in said n-type impurity regions (b).
24. The process of fabricating a semiconductor device according to any one of claims 1 to 19, wherein a concentration of said n-type impurity element contained in said n-type impurity regions (c) is 5 to 10 times as high as that of said p-type impurity element contained in said p-type impurity regions (b).
25. The process of fabricating a semiconductor device according to any one of claims 1 to 19, wherein an energy density of said first optical annealing is 250 to 500 mJ/cm², and the energy density of said second optical annealing is 100 to 300 mJ/cm².
26. The process of fabricating a semiconductor device according to any one of claims 1 to 8 or claims 11 to 14, or claims 18 to 19, wherein said first optical annealing is performed for improving the crystallinity of said semiconductor film or for promoting the crystallization of said semiconductor film.
28. The process of fabricating a semiconductor device according to any one of claims 1 to 19, wherein said second optical annealing is performed for activating said n-type or p-type impurity element introduced to said semiconductor film.
29. The process of fabricating a semiconductor device according to any one of claims 1 to 19, wherein, in said driving circuits, a portion or all of each of said n-type impurity regions (b) formed in said n-channel type TFTs is formed so as to overlap said gate wiring of said n-channel type TFTs, and,wherein in said pixel portion, said n-type impurity regions (c) formed in said pixel TFTs are formed so as not to overlap said gate wiring of said pixel TFTs.
30. The process of fabricating a semiconductor device according to claim 29, wherein said n-type impurity element is introduced to said n-type impurity regions (b) at a concentration higher than that of said n-type impurity regions (c).
31. The process of fabricating a semiconductor device according to claims to any one of claims 1 to 19, wherein said semiconductor device is an electro-optical device selected form the group consisting of an active matrix liquid crystal display device and an active matrix electroluminescence display.
32. The process of fabricating a semiconductor device according to claim 31, wherein said display device in installed into an electronic apparatus selected form the group consisting of a portable telephone, a video camera, a mobile computer, a goggle type display, a rear projector, a front projector, a personal computer, an electronic play apparatus, an image reproducing apparatus, and a digital camera.

2. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, subjecting said semiconductor film to a second optical annealing, patterning said semiconductor film to from active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

3. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, introducing an n-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits to form n-type impurity regions (b), introducing a p-type impurity element to said active layers of said n-channel type TFTs forming said driving circuit to form p-type impurity regions (b), subjecting said active layers to a second optical annealing, forming a gate insulating film on the active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFT to form a p-type impurity regions (a).

4. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, patterning semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, introducing a p-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing an n-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a second optical annealing, forming a gate insulating film on the active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

5. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, the fourth step of subjecting, to a first optical annealing, said semiconductor film, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, subjecting said semiconductor film to a second optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFTs to form p-type impurity regions (a).

6. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity region (b) are formed, subjecting said semiconductor film to a first optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, subjecting said semiconductor film to a second optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

7. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFT forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said semiconductor to a first optical annealing, patterning said semiconductor to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

8. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a same substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, introducing a p-type impurity element to those regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, subjecting said semiconductor film to a first optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

9. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing an amorphous structure over said substrate, introducing an p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming a crystalline semiconductor film by crystallizing said semiconductor film, subjecting said crystalline semiconductor film to a first optical annealing, patterning said crystalline semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

10. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing an amorphous structure over said substrate, introducing an n-type impurity element to regions of said amorphous structure containing semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, introducing a p-type impurity element to those regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, forming a crystalline semiconductor film by crystallizing said semiconductor film, subjecting said crystalline semiconductor film to a first optical annealing, patterning said crystalline semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings, introducing n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).
- View Dependent Claims (27)
- - 27. The process of fabricating a semiconductor device according to any one of claims 9, 10 and 15, wherein said first optical annealing is a step for crystallizing said semiconductor film containing the amorphous structure.

11. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film in to form active layers of said n-channel TFTs and p-channel TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a second annealing, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

12. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, patterning said semiconductor film to form active layers of n-channel TFTs and p-channel TFTs, introducing a p-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a second optical annealing, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel-type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

13. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, subjecting said semiconductor film to a first optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of the n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a second optical annealing, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel TFTs to form p-type impurity regions (a).

14. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of said n-channel TFTs and p-channel TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a first optical annealing, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

15. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing an amorphous structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, forming a crystalline semiconductor film by crystallizing said semiconductor film, subjecting said crystalline semiconductor film to a first optical annealing, patterning said crystalline semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a second optical annealing, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

16. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing an n-type impurity element to regions of said semiconductor film which are to constitute the n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said semiconductor film to a second optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, etching said gate insulating film by the using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a), forming an insulation film covering said gate wirings, and introducing an n-type impurity element by using said gate wirings as a mask to form n-type impurity regions (c).

17. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, subjecting said active layers to a second optical annealing, forming gate wirings on said gate insulating film, etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a), forming an insulation film, covering said gate wirings, and introducing an n-type impurity element to said active layers through said insulation film by using said gate wirings as a mask to form n-type impurity regions (c).

18. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to a first optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element, through said gate insulating gate insulating film, to said active layers of said n-channel type TFTs forming said driving circuits to form n-type impurity regions (b), introducing a p-type impurity element, through said gate insulating film, to said active layers of said n-channel type TFTs forming said driving circuit to form p-type impurity regions (b), subjecting said active layers to a second optical annealing, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFT to form a p-type impurity regions (a).

19. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over the substrate, subjecting said semiconductor film to a first optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing a p-type impurity element, through said gate insulating film, to said active layers of said n-channel type TFTs forming said driving circuit to form p-type impurity regions (b), introducing an n-type impurity element, through said gate insulating gate insulating film, to said active layers of said n-channel type TFTs forming said driving circuits to form n-type impurity regions (b), subjecting said active layers to a second optical annealing through said gate insulating film, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFT to form a p-type impurity regions (a).

33. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing a n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of said n-channel type TF Is and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).
- View Dependent Claims (47, 48, 49, 50, 51, 52, 53, 54, 55, 56)
- - 47. The process of fabricating a semiconductor device according to any one of claims 33 to 46,
48. The process of fabricating a semiconductor deice according to anyone of claims 33 to 46,wherein said p-type impurity regions (a) contains said p-type impurity element is contained at a concentration of 3×
- 10²⁰to 3×
  
  10²¹atoms/cm3, and wherein said p-type impurity regions (b) contains said p-type impurity element at a concentration of 1×
  
  10¹⁵to 1×
  
  10¹⁸atoms/cm³.
49. The process of fabricating a semiconductor device according to any one of claims 33 to 46,wherein said n-type impurity element is introduced in such a manner that the resistance values of said n-type impurity regions (a), (b) and (c) are made greater in the order of said n-type impurity regions (a)<
- said n-type impurity regions (b)<
  
  said n-type impurity regions (c), and wherein said p-type impurity element is introduced in such a manner that the resistance values of said p-type impurity regions (a), (b) are made greater in the order of said p-type impurity regions (a)<
  
  said p-type impurity regions (b).
50. The process of fabricating a semiconductor device according to any one of claims 33 to 46, wherein the concentration of said n-type impurity element contained in said n-type impurity regions (c) is ½
- to {fraction (1/10)} times as high as that of said n-type impurity element contained in said n-type impurity regions (b).
51. The process of fabricating a semiconductor device according to any one of claims 33 to 46, wherein a concentration of said n-type impurity element contained in said n-type impurity regions (c) is 5 to 10 times as high as that of said p-type impurity element contained in said p-type impurity regions (b).
52. The process of fabricating a semiconductor device according to any one of claims 33 to 46, wherein an energy density of said optical annealing is 250 to 500 mJ/cm².
53. The process of fabricating a semiconductor device according to any one of claims 33 to 46, wherein, in said driving circuits, a portion or all of each of said n-type impurity regions (b) formed in said n-channel type TFTs is formed so as to overlap said gate wiring of said n-channel type TFTs, and,wherein in said pixel portion, said n-type impurity regions (c) formed in said pixel TFTs are formed so as not to overlap said gate wiring of said pixel TFTs.
54. The process of fabricating a semiconductor device according to claim 53, wherein said n-type impurity element is introduced to said n-type impurity regions (b) at a concentration higher than that of said n-type impurity regions (c).
55. The process of fabricating a semiconductor device according to claims to any one of claims 33 to 46, wherein said semiconductor device is an electro-optical device selected form the group consisting of an active matrix liquid crystal display device and an active matrix electroluminescence display.
56. The process of fabricating a semiconductor device according to claim 55, wherein said display device in installed into an electronic apparatus selected form the group consisting of a portable telephone, a video camera, a mobile computer, a goggle type display, a rear projector, a front projector, a personal computer, an electronic play apparatus, an image reproducing apparatus, and a digital camera.

34. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film to from active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

35. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, introducing an n-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits to form n-type impurity regions (b), introducing a p-type impurity element to said active layers of said n-channel type TFTs forming said driving circuit to form p-type impurity regions (b), forming a gate insulating film on the active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFT to form a p-type impurity regions (a).

36. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, patterning semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, introducing a p-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing an n-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming a gate insulating film on the active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

37. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, the fourth step of subjecting, to an optical annealing, said semiconductor film, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFTs to form p-type impurity regions (a).

38. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing an n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity region (b) are formed, subjecting said semiconductor film to an optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs,, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

39. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film in to form active layers of said n-channel TF Is and p-channel TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

40. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, patterning said semiconductor film to form active layers of n-channel TFTs and p-channel TFTs, introducing a p-type impurity element to said active layers of said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel-type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

41. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, subjecting said semiconductor film to an optical annealing, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of the n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel TFTs to form p-type impurity regions (a).

42. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing an amorphous structure over said substrate, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, forming a crystalline semiconductor film by crystallizing said semiconductor film, subjecting said crystalline semiconductor film to an optical annealing, patterning said crystalline semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).

43. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, introducing an n-type impurity element to regions of said semiconductor film which are to constitute the n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, forming gate wirings on said gate insulating film, etching said gate insulating film by the using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a), forming an insulation film covering said gate wirings, and introducing an n-type impurity element by using said gate wirings as a mask to form n-type impurity regions (c).

44. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over said substrate, subjecting said semiconductor film to an optical annealing, introducing a p-type impurity element to regions of said semiconductor film which are to constitute said n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed, patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element through said gate insulating film to said active layers of said n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed, forming gate wirings on said gate insulating film, etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), introducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a), forming an insulation film, covering said gate wirings, and introducing an n-type impurity element to said active layers through said insulation film by using said gate wirings as a mask to form n-type impurity regions (c).

45. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over the substrate, subjecting said semiconductor film to an optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing an n-type impurity element, through said gate insulating, to said active layers of said n-channel type TFTs forming said driving circuits to form n-type impurity regions (b), introducing a p-type impurity element, through said gate insulating film, to said active layers of said n-channel type TFTs forming said driving circuit to form p-type impurity regions (b), forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFT to form a p-type impurity regions (a).

46. A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;
- forming a semiconductor film containing a crystalline structure over the substrate, subjecting said semiconductor film to an optical annealing, patterning said semiconductor film to form active layers of n-channel type TFTs and p-channel type TFTs, forming a gate insulating film on said active layers, introducing a p-type impurity element, through said gate insulating film, to said active layers of said n-channel type TFTs forming said driving circuit to form p-type impurity regions (b), introducing an n-type impurity element, through said gate insulating, to said active layers of said n-channel type TFTs forming said driving circuits to form n-type impurity regions (b), forming gate wirings on said gate insulating film, introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c), etching said gate insulating film by using said gate wirings as a mask, introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), and introducing a p-type impurity element to said active layer of said p-channel type TFT to form a p-type impurity regions (a).

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Litigation Campaign Assessment

Current Assignee
Semiconductor Energy Laboratory Co., Ltd.
Original Assignee
Semiconductor Energy Laboratory Co., Ltd.
Inventors
Koyama, Jun, Yamazaki, Shunpei, Kitakado, Hidehito
Primary Examiner(s)
Bowers, Charles
Assistant Examiner(s)
MENZ, LAURA MARY

Application Number

US09/523,675
Time in Patent Office

592 Days
Field of Search

438/151, 438/535, 438/162, 438/154, 438/27, 438/550, 438/479, 438/307, 438/163, 438/486, 438/297, 438/549, 438/505, 438/638, 438/692, 438/916, 438/150, 438/160, 438/308, 438/701, 438/155, 438/142, 438/149, 438/164, 438/485, 438/487, 257/66, 257/65, 257/59, 257/344, 257/336, 257/347, 257/298, 257/350, 257/345, 257/64, 257/578, 257/204, 257/351, 257/354, 257/752
US Class Current

438/151
CPC Class Codes

H01L 2029/7863   with an LDD consisting of m...

H01L 27/1214   comprising a plurality of T...

H01L 27/127   with a particular formation...

H01L 27/1274   using crystallisation of am...

H01L 29/78621   with LDD structure or an ex...

H01L 29/78624   the source and the drain re...

H01L 29/78627   with a significant overlap ...

Process of fabricating a semiconductor device

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Process of fabricating a semiconductor device

First Claim

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0 Petitions

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Accused Products

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Abstract

Citations

56 Claims

Specification

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Solutions

Use Cases

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