Apparatus for sampling and displaying an auxiliary image with a main image
First Claim
Patent Images
1. Apparatus for displaying a combined image of an auxiliary image and a main image, comprising:
- a source of a main image signal;
a source of samples representing an auxiliary image signal;
a quincunx subsampler, coupled to the auxiliary image sample source; and
a signal combiner, coupled to the main image signal source and the quincunx subsampler, for combining the main image representative signal and a signal representing the quincunx subsampled samples to generate a signal representing a combined image of the main and auxiliary images.
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Abstract
Apparatus for displaying a combined image of an auxiliary image and a main image includes a source of a main image signal and a source of samples representing an auxiliary image signal. A quincunx subsampler is coupled to the auxiliary image sample source and the quincunx subsampler. The sample combiner combines the main image signal and a signal representing the quincunx subsampled samples to generate a signal representing a combined image of the main and auxiliary images.
26 Citations
17 Claims
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1. Apparatus for displaying a combined image of an auxiliary image and a main image, comprising:
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a source of a main image signal;
a source of samples representing an auxiliary image signal;
a quincunx subsampler, coupled to the auxiliary image sample source; and
a signal combiner, coupled to the main image signal source and the quincunx subsampler, for combining the main image representative signal and a signal representing the quincunx subsampled samples to generate a signal representing a combined image of the main and auxiliary images. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
a source of an auxiliary image signal, including a video component and synchronization component;
an auxiliary analog-to-digital converter responsive to the auxiliary image signal video component, for generating samples representing the auxiliary video component; and
an auxiliary timing signal generator, responsive to the auxiliary image signal synchronization component, for generating the auxiliary sample timing signal.
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4. The apparatus of claim 3 wherein the quincunx subsampler is further responsive to a timing signal from the auxiliary timing signal generator.
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5. The apparatus of claim 1, further comprising a main timing signal generator, coupled to the main image signal source;
- and wherein the sample combiner comprises;
an inset image display generator, coupled to the quincunx subsampler and responsive to a timing signal from the main clock signal generator, for generating a signal representing an inset auxiliary image; and
multiplexer, having a first data input terminal coupled to the inset image display generator, a second data input terminal coupled to the main image signal source, and an output terminal producing a signal representing the combined image.
- and wherein the sample combiner comprises;
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6. The apparatus of claim 5, wherein:
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the main timing signal generator further produces a select signal having a first state when the signal from the inset image display generator forms the combined image, and a second state when main image signal forms the combined image; and
the multiplexer further comprises a control input terminal responsive to the select signal, and couples the inset image signal to its output terminal when the select signal has the first state and the main image signal to its output terminal when the select signal has the second state.
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7. The apparatus of claim 1, where the signal combiner comprises:
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an inset image display generator, coupled to the quincunx subsampler; and
a multiplexer, having a first data input terminal coupled to the inset image display generator, a second data input terminal coupled to the main image signal source, and a output terminal producing the combined image representative signal.
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8. The apparatus of claim 1, further comprising a memory, coupled between the quincunx subsampler and the signal combiner, for storing a field of quincunx subsampled samples.
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9. The apparatus of claim 8, wherein the memory is responsive to a write address signal, and further comprising:
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a source of an auxiliary image video signal, including a synchronization component;
an auxiliary timing signal generator, responsive to the auxiliary image signal synchronization component, for generating an auxiliary sample timing signal; and
a write address generator, responsive to the auxiliary sample timing signal, for generating a write address signal for the memory.
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10. The apparatus of claim 8, wherein the memory is responsive to a write address signal, and further comprising:
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a source of an auxiliary image video signal, including a synchronization component;
a main timing signal generator, responsive to the main image signal synchronization component, for generating a main sample timing signal; and
a read address generator, responsive to the main sample timing signal, for generating a read address signal for the memory.
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11. Apparatus for displaying a combined image of an auxiliary image and a main image, comprising:
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a source of a main image signal;
a source of samples representing an auxiliary image signal;
a quincunx subsampler, coupled to the auxiliary image sample source, for compressing said auxiliary signal by vertical filtering and horizontally subsampling said vertically filtered signal to produce a quincunx pattern; and
a signal combiner, coupled to the main image signal source and the quincunx subsampler, for combining the main image signal and said compressed and quincunx sampled signal to generate a signal representing a combined image of the main and auxiliary images;
wherein the auxiliary image sample source comprises;
a source of an auxiliary image signal, including a video component and a synchronization component;
an auxiliary analog-to-digital converter responsive to the auxiliary image signal video component, for generating samples representing the auxiliary video component; and
an auxiliary timing signal generator, responsive to the auxiliary image signal synchronization component, for generating the auxiliary sample timing signal; and
whereinthe quincunx subsampler is further responsive to a timing signal from the auxiliary timing signal generator;
the auxiliary timing signal generator further generates an auxiliary horizontal synchronization reset signal and an auxiliary field type signal having a first state during auxiliary video odd fields and a second state during auxiliary video even fields; and
the quincunx subsampler comprises;
a subsampler, coupled to the auxiliary sample source, and responsive to a subsample timing signal, for subsampling the auxiliary video component representative samples at times determined by the subsample timing signal;
a timing signal divider, responsive to the auxiliary sample timing signal and a reset signal, for producing the subsample timing signal; and
a reset signal generator, responsive to the auxiliary horizontal synchronization reset signal and the auxiliary field type signal, for generating a reset signal producing a first sampling pattern in even auxiliary fields and a second sampling pattern in odd auxiliary fields. - View Dependent Claims (12, 13, 14)
the timing signal divider produces one subsample timing signal for each predetermined number of auxiliary sample timing signals, starting at the time the reset signal is received; and
the reset signal generator is responsive to the auxiliary field type signal having the first state to produce a reset signal simultaneous with the auxiliary horizontal synchronization reset signal, and is responsive to the auxiliary field type signal having the second state to produce a reset signal which is the auxiliary horizontal synchronization reset signal delayed by one half the predetermined number of auxiliary sample timing signals.
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13. The apparatus of claim 12 wherein the reset signal generator comprises:
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a delay circuit, responsive to the auxiliary horizontal synchronization reset signal, for delaying the auxiliary horizontal synchronization reset signal by one half the predetermined number of auxiliary sample timing signals;
a multiplexer having a first data input terminal responsive to the auxiliary horizontal synchronization reset signal, a second data input terminal coupled to the delay circuit, a control input terminal responsive to the auxiliary field type signal, and an output terminal producing the reset signal.
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14. The apparatus of claim 11 wherein:
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subsamples are taken in the first sampling pattern at respective times in each horizontal line corresponding to respective horizontal positions; and
subsamples are taken in the second sampling pattern at respective times in horizontal lines corresponding to horizontal positions midway between the respective horizontal positions in the first sampling pattern.
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15. Apparatus for displaying a combined image of an auxiliary image and a main image, comprising:
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a source of a main image signal;
a source of samples representing an auxiliary image signal;
a quincunx subsampler, coupled to the auxiliary image sample source, for compressing said auxiliary signal by vertical filtering and horizontally subsampling said vertically filtered signal to produce a quincunx pattern;
a signal combiner, coupled to the main image signal source and the quincunx subsampler, for combining the main image signal and said compressed and quincunx sampled signal to generate a signal representing a combined image of the main and auxiliary images; and
a main timing signal generator, coupled to the main image signal source;
wherein the signal combiner comprises;
an inset image display generator, coupled to the quincunx subsampler and responsive to a timing signal from the main clock signal generator, for generating a signal representing an inset auxiliary image; and
a multiplexer, having a first data input terminal coupled to the inset image display generator, a second data input terminal coupled to the main image signal source and an output terminal producing a signal representing the combined image; and
whereinthe main timing signal generator further produces a select signal having a first state when the signal from the inset image display generator forms the combined image, and a second state when main image signal forms the combined image; and
the multiplexer further comprises a control input terminal responsive to the select signal, and couples the inset image signal to its output terminal when the select signal has the first state and the main image signal to its output terminal when the select signal has the second state; and
whereinthe main timing signal generator produces a main field type signal having a first state during an even main field, and a second state during an odd main field; and
the inset image display generator produces an inset image signal using a first display pattern when the main field type signal has the first state, and using a second display pattern when the main field type signal has the second state. - View Dependent Claims (16, 17)
the main timing signal generator generates the main sample timing signal as successive timing signal pulses; and
the inset image display generator comprises;
a sample retrieval circuit, coupled to the quincunx subsampler, for producing inset image display samples comprising successive pairs of samples, a first sample of the pair being a quincunx subsampled auxiliary image sample at one main timing signal pulse, and a second sample of the pair being the first sample of the pair repeated at the next main timing signal pulse; and
a circuit for producing the successive pairs of samples in synchronism with the main sample timing signal when the main field type signal has the first state, and in synchronism with the main sample clock signal delayed by one main sample clock cycle when the main field type signal has the second state.
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17. The apparatus of claim 16 wherein the inset image display generator comprises:
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a one main sample timing signal cycle delay circuit, coupled to the sample retrieval circuit; and
a multiplexer, having a first data input terminal coupled to the sample retrieval circuit, a second data input terminal coupled to the delay circuit, a control input terminal responsive to the main field type signal, and an output terminal producing the inset image samples.
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Specification