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Non-volatile semiconductor memory device

  • US 6,307,785 B1
  • Filed: 09/06/2000
  • Issued: 10/23/2001
  • Est. Priority Date: 11/13/1995
  • Status: Expired due to Term
First Claim
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1. A non-volatile semiconductor memory device comprising:

  • a memory cell section including a plurality of memory cells which are connected in series;

    a first common signal line transferring data from/to said memory cell section; and

    a first select transistor arranged between said first common signal line and said memory cell section, wherein during a program operation, in the case that said memory cell section is write-selected, a write select voltage is applied to said first common signal line and the write select voltage is transferred to a channel of said memory cell section, and in the case that said memory cell section is write-inhibited, a write unselect voltage is applied to said first common signal line, and the write unselect voltage is transferred to a channel of said write memory cell section by applying a first select gate voltage higher than the write unselect voltage, to a gate of said first select transistor and control gates of said plurality of memory cells, and then a pass voltage higher than the first select gate voltage is applied to the control gates of the unselected memory cells and a program voltage higher than the pass voltage is applied to the control gate of the selected memory cell so that in the case that said memory cell section is write inhibited, the channel of said memory cell section is boosted by a capacitive coupling of the channel of said plurality of memory cells with the control gates thereof and in the case that said memory cell section is write-selected, the channel of said memory cell section is kept at a write select voltage.

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